First of all you can control the voltage on the inverting input (-) in the range of 9 to 10V.
Opamp will try to keep the voltage on both its inputs the same by varying the output voltage. First assume that opamp is working in its linear region (output voltage is not saturated). This means the voltage on the non-inverting input (+) is exactly the same as the voltage on the inverting input.
If you set the voltage to 10V the voltage difference on the resistor R3 is 0V. Using Ohm's law this yields zero current. This also means there is 0A going through the load.
If you set the voltage to 9V the voltage on the R3 resistor is nor 1V (10V-9V). Using Ohm's law gives 1A. All this current is also going through the load (because opamp's input current is zero).
This way you can control the load current from 0 to 1A.
Now the dynamic behavior.
Assume you set 9.5V with the potentiometer. The voltage on the collector of the transistor is 9.5V. This means R3 voltage is 0.5V and load current is also 0.5A.
Now change the potentiometer to 9.6V. Opamp's inputs are not balanced any more. The inverting input's voltage is higher than the non-inverting input. Therefore opamp will adjust its output by lowering the voltage on the base of the transistor. The collector current will drop and so will the voltage on R3. V(R3) will drop to 0.4V at which point the input voltages will be equal and you will have a steady-state again.
Practical considerations.
Almost any opamp will work correctly in this circuit. You must consider maximal current opamp can give to the gate. If your output current is max. 1A, the gate current has to be 1A/(transformer beta). You must choose an opamp that will provide at least this much current.
You must also be aware that if you want your circuit to work when the output is shorted the voltage on the output has to go down to GND+0.7V. Even if it does not you can very easily correct it by adding a base resistor.
The fact that the base is common to the input and output signals does not imply that the base is at the lowest voltage (assuming npn). Compare with common collector (aka emitter follower): the collector is at the highest voltage, not at the lowest!
In the common base configuration the base is held at a fixed voltage, the input is applied to the emitter, the output is taken from the collector. The input signal will be loaded heavily (input impedance is very low), output impedance is high, current amplification is ~ 1, voltage amplification is very high.
This configuration is sometimes used in HF stages.
With some hand-waving the long-tailed pair (input stage of an opamp) with one input fixed can be seen as an emitter follower + a common base.
Best Answer
When Q1 is off Q2 turns on, (with Q2's "base" at 0.7v), and the output line goes low, (near 0v).
When Q1 is turned on Q2 turns off, and the output returns to the voltage determined by the resistor divider.
This is assuming the ouput line connects at R2-R3, as your connection dot is shown offset.