Can we simulate FPGA board

Now that question will open a can of worms! Basically, there is no way to accurately answer that question because there are so many factors involved. That being said...

The "quick" answer is that I wouldn't be concerned until the signal frequencies get near 1 MHz. Between 1 and 10 MHz I would be extra careful. And above 10 MHz I would have a PCB made. Of course there are exceptions, and this is what I would do, etc. But as a rough order of magnitude place to start, it works.

There are many issues involved with this, and I'll try to cover them here...

As others have stated, it's not the signal frequency but the rise/fall time of the signal edges. If you can slow down the edges (but not too much) then you'll have an easier time. FPGA's are great for this because you can change the slew rate and drive strength of the I/O Pins. In a synchronous system, this is more important on the clock lines than the data lines (I'm not saying that data isn't important, however.)

While doing proper signal termination is important, you can't do signal termination without knowing the characteristic impedance of the wire. And in a breadboard type system you won't know what the impedance is, no matter how hard you try. In this case, you'll simply end up twiddling with it until it just happens to work.

Pay attention to the signal return paths and loop currents. This is going to play the biggest part in making the system run fast. Of course, this is damn near impossible to do correctly with a breadboard, but those are the breaks. This is why people use power/gnd planes and 4+ layer PCB's.

I've ran PCIe (2.5 GHz) over wire-wrap-wire for about 5 inches. And I've ran PCIe over a "commercially available" wire for 12 inches. So you can get good performance from wire. It's all in how you use it.

A good breadboard can probably run faster than a bad 2-layer PCB.

Of course, most modern parts are in packages that require a PCB.

You need an HDL simulator. Icarus Verilog or GHDL are two opensource options (one for Verilog and one for VHDL, depending on what language your source code is written in)

With the simulator you can examine (veeerrrry slowly compared to the actual FPGA) what goes on inside with full visibility of the internal signals.

However, you are not likely to break the board just with code - as long as you treat it carefully with regard to keeping high voltages off the pins (nothing > 3.3V), take reasonable precautions against static zapping it, a well-designed board will take any code you can throw at it without blowing up. Heat may be a potential problem, but usually the code stops working as the chip heats up (and usually it stops heating up then as the logic stops toggling as it's all confused and the state machines tend to lock up). Stick a big heatsink on it or some temperature sensitive labels if you are worried.