Do shift registers refresh

digital-logicshift-registertransient

Say there are 2 Shift Registers chained together with the following values

SR1 : 11111111
SR2 : 11001111

The data is written to SR1 and then to SR2 like:

digitalWrite(SensLatchPin, LOW);
shiftOut(SR,LSBFIRST,B11001111);//SR2
shiftOut(SR,LSBFIRST,B11111111);//SR1
digitalWrite(SensLatchPin, HIGH);

If the SR2's data is changed with time, does SR1 refresh (as in, set all outputs to 0 and then reset to the same value)?

For example, the following code is executed (only change for SR2)

digitalWrite(SensLatchPin, LOW);
shiftOut(SR,LSBFIRST,B11101111);//SR2
shiftOut(SR,LSBFIRST,B11111111);//SR1
digitalWrite(SensLatchPin, HIGH);

In the above case, does the SR1 outputs toggle or does it remain same without any transition (as the values before and after latching are same?)

Best Answer

Your question text contradicts itself a bit:

"2 Shift Registers chained together"

does not match with

"data is written to SR1 and then to SR2 "

From your comment I understand that the SRs are chained, SR1 directly to the uC, SR2 to SR1.

In that case each shiftOut call transfers its data to SR1, and simultaneously trasnfers the content of SR1 to SR2.

Assuming that you use SRs with separate shift and hold registers, the output should not glitch when you 're-issue' the same value for a pin, but do check the datasheet of you chip. Very short glitches around a clock edge are always a possibility, and most datasheets do not completely rule this out.

Related Solutions

Electronic – Clocked edge-triggered timing (contamination delay)

From my textbook, Digital Design and Computer Architecture, Harris and Harris, pg. 88

enter image description here

An important note

When you are attempting to find the propagation delay of a combinational circuit with multiple elements, you must add the propagation delay through the critical path.

However when you are attempting to find the contamination delay of a combinational circuit with multiple elements, you must add the contamination delay through the shortest path.

That much is probably obvious to you.

Actually, it sounds to me like you are referring to contamination delay. You said contamination delay is the amount of time measured after an input changes that the output remains valid. If you mean the previous output, then yes, because that means the same thing as until the output begins changing to the new value.

Addition

About your question as to how this deals with reading and writing from a register. This confused me for awhile, but I think it makes perfect sense to me now.

So what you said about contamination delay and hold time is correct. This problem applies to when flip-flops are daisy chained. And if you think about it, it also only applies to when you want to read and write at the same time.

Imagine a circuit with just 2 flip flops. It doesn't necessarily have to be a register, just that the first flip-flop is the storage element that is written to, and the 2nd flip-flop is the storage element that reads the first one. If you only needed to read and write on different clock cycles, then none of this delay stuff would matter, because reading would always occur on a different clock cycle when the output of the first was stable, and couldn't change since writing can't occur in the same clock cycle.

However if you wanted to write a new value to the 1st flip-flop, as well as read the previous value properly into the 2nd on the same clock cycle, then that is the exact situation you described, where if the contamination delay of the first was less than the hold time of the second, then writing to the first would thereby contaminate the reading of the second. It makes perfect sense. The read has to occur successfully before the write begins to change what's being read, or else the value gets lost.

Electronic – arduino – Sharing Clock and Data for 74HC595 and CD4021B Shift Registers

If I may answer my own question. It should work. Here's how with arduino over SPI.

void setup() {
    //Setup SPI
    SPI.begin();
    //Setup CD4021
    pinMode(CD4021_PSC_PIN9, OUTPUT);
    digitalWrite(CD4021_PSC_PIN9,HIGH);
    //Setup 74HC595
    pinMode(HC595_LATCH_PIN12, OUTPUT);
    digitalWrite(HC595_LATCH_PIN12,HIGH);
}

void loop(){
    //Shift out to 74HC595
    digitalWrite(HC595_LATCH_PIN12,LOW);
    SPI.transfer(BYTE_DATAOUT);
    digitalWrite(HC595_LATCH_PIN12,HIGH);

    //Shift in from CD4021B
    digitalWrite(CD4021_PSC_PIN9,LOW);
    BYTE_DATAIN = SPI.transfer(0x00);
    digitalWrite(CD4021_PSC_PIN9,HIGH);
}

Learned from here, from someone who has done this exact implementation before.

Best Answer

Related Solutions

Electronic – Clocked edge-triggered timing (contamination delay)

Electronic – arduino – Sharing Clock and Data for 74HC595 and CD4021B Shift Registers

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