Do shift registers refresh

digital-logicshift-registertransient

Say there are 2 Shift Registers chained together with the following values

SR1 : 11111111
SR2 : 11001111

The data is written to SR1 and then to SR2 like:

digitalWrite(SensLatchPin, LOW);
shiftOut(SR,LSBFIRST,B11001111);//SR2
shiftOut(SR,LSBFIRST,B11111111);//SR1
digitalWrite(SensLatchPin, HIGH);

If the SR2's data is changed with time, does SR1 refresh (as in, set all outputs to 0 and then reset to the same value)?

For example, the following code is executed (only change for SR2)

digitalWrite(SensLatchPin, LOW);
shiftOut(SR,LSBFIRST,B11101111);//SR2
shiftOut(SR,LSBFIRST,B11111111);//SR1
digitalWrite(SensLatchPin, HIGH);

In the above case, does the SR1 outputs toggle or does it remain same without any transition (as the values before and after latching are same?)

Best Answer

Your question text contradicts itself a bit:

"2 Shift Registers chained together"

does not match with

"data is written to SR1 and then to SR2 "

From your comment I understand that the SRs are chained, SR1 directly to the uC, SR2 to SR1.

In that case each shiftOut call transfers its data to SR1, and simultaneously trasnfers the content of SR1 to SR2.

Assuming that you use SRs with separate shift and hold registers, the output should not glitch when you 're-issue' the same value for a pin, but do check the datasheet of you chip. Very short glitches around a clock edge are always a possibility, and most datasheets do not completely rule this out.