Electrical – 555 timer circuit with d type flip-flop

The choice is purely arbitrary. Some flip-flop types can reduce the complexity of your next-state logic. However it is really hard to say which one will be best because you would need to check every flip-flop type with every encoding you could possibly use.

D flip-flops are easy to use because its excitation is exactly the same as the next state.

If you plan to use CPLDs or FPGAs to implement your machine use D flip-flops as they will have a D flip-flop built in. their

The first one is not master-slave; you would have to cascade two copies of that circuit (with the clock inverted between them) to get the same functionality as the second circuit, which is indeed a master-slave (edge-triggered) flip-flop.