Electrical – Acquisition time of sample & hold circuit

adcanalogcapacitorsample and hold

What determines the acquisition time of a sample and hold circuit?

For example if I had wanted to design a circuit that samples at every 0.1 second intervals what would limit and affect the desired acquisition time?

Would it just be how long the capacitor takes to charge? Or are other factors involved

Best Answer

I think the question is about "S/H aperture", or "effective aperture time". Yes, roughly speaking, it is a time required to charge the hold capacitor to the level corresponding to ADC resolution. On fast changing signals it is more complicated.

There is a vast literature on the subject. Please examine, for example, this Texas Instruments application note #223, for comprehensive details and definitions.