Electrical – Current source driving capacitor in LTspice

When calculating the S-parameters, you should terminate all of the ports that don't have stimulus applied. So, in your situation, to calculate \$S_{11}\$ and \$S_{21}\$, you'd be working with this circuit:

^{simulate this circuit – Schematic created using CircuitLab}

Notice that the current passing through the capacitor from port 1 to port 2 is \$i_1\$ and \$-i_2\$ at the same time.

Now you can easily calculate \$i_1\$ and \$i_2\$ using the series impedance rule:

$$i_1 = -i_2 = \frac{v_s}{2Z_0+1/j\omega{}C}$$

And you can also calculate \$v_1\$ and \$v_2\$ using the voltage divider rule,

$$v_1 = \frac{Z_0+1/j\omega{}C}{2Z_0+1/j\omega{}C}v_s$$

$$v_2 = \frac{Z_0}{2Z_0+1/j\omega{}C}v_s$$

Then you can convert these voltages to the incident and reflected wave variables at each port by

$$a_n=\frac{1}{2}\frac{v_n+Z_0i_n}{\sqrt{\Re\left({Z_0}\right)}}$$

$$b_n=\frac{1}{2}\frac{v_n-Z_0^\star{}i_n}{\sqrt{\Re\left({Z_0}\right)}}$$

(which get a lot less hairy when you start plugging in numbers, since your \$Z_0\$ is purely real)

And then you have

$$S_{11}=\frac{b_1}{a_1}$$

and

$$S_{21}=\frac{b_2}{a_1}$$

I'm pretty sure this will show you that your equations for the off-diagonal parameters aren't quite right. You might be thinking that \$S_{11} + S_{21} = 1\$ because of conservation of energy, however this isn't correct because the travelling wave parameters are not proportional to the signal power but to its square root. To get the correct conversions from Z-parameters to S-parameters, see the Wikpedia page on Z-parameters.

The first expression gives how the capacitor is charging from 0V to \$E_C\$ through the resistor \$R_C\$. So time constant = \$R_CC_L\$. hence the expression: $$u_{CL}\left ( t \right )=E_c(1-e^{\frac{-t}{R_C C_L}})$$

After the capacitor is charged to \$E_C\$ the input changed and transistor becomes 'on'. Now the capacitor will discharge from \$E_C\$ to \$U_{CE_{sat}}\$ through the transistor, equivalent resistance of which is \$R_{CE}\$. Where \$U_{CE_{sat}}\$ is the collector-emitter voltage when transistor is in saturation. So the discharging of capacitor can be expressed as:

$$u_{CL}\left ( t \right )=U_{CE_{sat}} +(E_c-U_{CE_{sat}}) e^{\frac{-t}{R_{CE} C_L}}$$

1st expression is the charging equation.

\$U_{CE_{sat}}\$ is usually a small voltage (0.2-0.3V) compared to \$E_C\$, many a people approximates \$E_c-U_{CE_{sat}}\$ to \$E_C\$. And in that case this becomes your second expression.

2nd expression is the discharging equation.

From the two expressions above, one can see that the charging and discharging time depends on the capacitance and resistance values through which it charge/discharges. Now if the value of \$R_{CE}\$ is less than that of \$R_C\$, the time taken for the capacitor to discharge fully will be less than that of the time required to charge. I think in your case, the discharging time few times smaller than charging time and hence in the plot, it looks like an abrupt transition.