Electrical – Encoder ICs replaces shift registers?

The 74xx165 is the more typical choice. The 74HC597 is only better if it will be necessary to sample the input during a byte transition (and then make the sample available for the following transmission). Because the front-edge latch is rising-edge sensitive but the parallel-load latch is level sensitive, there will often not be any good signal anywhere to clock the parallel-load latch. The part would be much nicer if either both latches were level-sensitive, but otherwise the front-end latch is more likely to be a nuisance than to serve any functional purpose.

BTW, the similar timing issues exist with the 74HC595's asynchronous clear. If the parallel-load pin were level-sensitive, one could asynchronously drive the clear pin and the parallel load, so as to force all outputs to a known state. Unfortunately, the edge-triggered parallel-load pin gets in the way of such a design; one could asynchronously drive the clear pin, but one would have to then drive the parallel-load pin some time after the clear signal had registered.

Yes, in fact the Kenbak-1 (considered to be the world's first personal computer, years before the Apple //) used serial memory. It was introduced in 1971 as a teaching machine.

It didn't use a microprocessor since the first one (Intel's 4004), had not been released yet when the Kenbak-1 was designed. Instead the CPU was made up of discrete TTL chips.

The Kenbak-1 had only 256 bytes of memory, implemented using two 1024-bit MOS shift registers. So it was rather slow, averaging only about 1000 instructions per second despite it's 1 MHz clock.

The instruction set was similar to the Motorola 6800, which would not appear until several years later. It had two 8-bit accumulators, A and B, and a 8-bit index register, X. The memory addressing modes were immediate (constant), memory, indirect, indexed, and indirect-indexed which provided more capability than most microprocessors introduced later in the decade.