i just wanted to verify if my insights are correct regarding the title/issue of this question. I don't have any hardware for me to see the output so i'm trying to visualize it via math and though simulation.
i read a lot of daisy chain blogs, sites but i seldom see detailed information about receiving data from these daisy chains (more on master output/broadcast data to daisy chain slaves) or over receiving data from one (1) SPI slave also haha
Here's the site i lastly read but still gave me a vogue idea about it. (maybe i'm too dumb to realize it w/o details xD)
https://learn.sparkfun.com/tutorials/serial-peripheral-interface-spi
1) First question, i understand the image above which means that as long i sent a byte (8 bit; command/instruction) from uC to an SPI Slave via MOSI line, this SPI Slave will automatically send a byte data to the MISO line w/o disabling chip select. When the byte data sent by SPI Slave was received by uC is the time i should disable my chip select. Is that correct?
I ask about it since when it comes to daisy chain, it looks like this is not the case. After i read through the sparkfun's spi tutorial as well as on maxim's blog note on SPI https://www.maximintegrated.com/en/app-notes/index.mvp/id/3947
instead when daisy chained, even though the 1st SPI slave receives a byte of command, it will not execute it and continue to pass the byte command to another SPI Slave when it receives another byte, NOT UNTIL I DISABLE CHIP SELECT will execute the received command(s) on SPI Slave(s). Is that correct?
2) Second question, do SPI Slaves in daisy chain automatically understood or separate bits into instruction like let's say SPI Slave1 receives 2 byte of command. After receiving the 1st byte of command and receives a bit from the 2nd byte of command along the way, does this slave will flush one time the 1st byte of command to the SPI Slave2 for it to have only a 1 bit from the 2nd byte and would accept the following bits for it to complete the 2nd byte command? would it be among the two on the table below?
3) Third question, if on daisy chain setup and the statement/process of disabling the disabling the chip select would execute commands being held by Slaves is true, how would the feedback of data transmission on MISO line to uC would look like then? I have this SPI device where after receiving a 1 byte command, it will feedback 3 byte data. Would it be among the two on the table below?
I hope you could ease my this conflict like a tumor in my head 😀 thanks.
Best Answer
SPI doesn't define anything on data link level (i.e., how to interpret the data being transmitted), so a specific answer is only possible for a specific device. Each slave should specify whether it can be daisy-chained, and how the transmissions to daisy-chained devices should look like. Typically, devices which support daisy chaining either don't reply at all (i.e. they copy MOSI to MISO via a shift register), or they only reply to transmission with the right address, passing everything else along.
What is specified by SPI is chipselect behaviour. If you deassert chipselect, all slaves will ignore data and clock completely.