Electrical – For the same JFET why are there two curves in a Transfer characteristics graph

device-characteristicsjfet

I am trying to learn about n-channel JFETs from David. A. Bell's book. In the transfer characteristics graph, there seem to be two curves as shown. Note that VGS(off) = Vp

enter image description here

As you can see, one curve is drawn for the minimum values of VGS(off) and IDSS and the other curve is drawn for the maximum values of VGS(off) and IDSS. The book shows an excerpt from a data sheet and says that the manufacturer has mentioned the values of minimum and maximum of VGS(off) and IDSS and uses this formula to draw the curves:

enter image description here

I can't understand how there can be maximum and minimum values for the cut-off voltage and the drain current. From the input characteristics graph, I understand that cut-off voltage is nothing but the Pinch-off voltage when there is no voltage applied between the gate and the source(ie) when VGS=0. Now, if there is a maximum and minimum cut off voltage then that means for VGS=0 there are two pinch-off voltages which doesn't make any sense. Also what does having a minimum "saturation" current even mean?

Best Answer

Any given FET (at least when at a fixed temperature) will have just one curve, somewhere between those two limits.

Unfortunately, FETs are difficult to make consistently, and if you buy a number of 2Nxyz FETs, you can expect that their curves will not be identical, even if they are from the same batch. If they're from different batches, you should expect a wider spread.

The manufacturer has gone to the trouble of characterising what he expects to be the minimum and maximum possible numbers likely with his manufacturing process, so that you have some idea over what range any FET of that type you buy will have. This is important, as your bias circuit must be able to properly bias any FET within that range. If your bias circuit does not handle that range of numbers, then you need to buy a better specified (probably selected, and so more expensive) FET, or to improve your bias circuit.