Electrical – Gate count and dynamic power calculation in Xilinx


How do I calculate the gate count and dynamic power for a design in Xilinx? I am doing a project on Xilinx using ISE 14.7. I do not understand the gate count and dynamic power for the design.

Best Answer

You can't get an ASIC-equivalent gate count directly on an FPGA. What you can get are lists of what FPGA primitives are used by the design. Check the _utilization_synth.rpt and _utilization_placed.rpt reports.

As for power consumtion estimates, check the _power_routed.rpt report. This will list the static and dynamic power, as well as temperature range estimates if you have properly specified the heat sink.

Edit: oops, you're using ISE. Primitive count will be in the .map, .mrp, and .par files. For power, you will need to run the power analyzer. See http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/pp_p_process_xpower_analyzer.htm .