There's a lot of great information on driving DC brushed motors from h-bridges. Preventing back-emf with diodes and bulk capacitance from electrolytic capacitors
When designing a high powered h bridge driver, people agree that bulk capacitance is required. It helps absorb the power surges when changes directions, braking, or back-emf. It also helps to avoid a voltage sag on the main rail.
It seems that people will throw as much large electrolytics in parallel as they can, hoping it is enough. To calculate how much is required, there isn't much information available. Other than saying the peak current, wire inductance, battery impedance, etc is required, then not showing what to do with that.
Is there any practical way to determine the amount of bulk capacitance required? My application is a super compact, 45A+ 4s H-Bridge driver. I can't afford the space to just blindly throw capacitors on and hope for the best.
I know there's not a great exact way to calculate this, but there has to be some way to get close.
Best Answer
By '4S' I presume you mean a 14.8 V Li-ion battery. This is good because the battery makes a relatively 'stiff' power source (unlike a power supply which might not be able to absorb much current). The main problem you have is the inductance of the battery leads, and the main thing to worry about is the voltage rating of the H-bridge FETs.
When PWM is applied the battery current is a 'square' wave, and the simplified circuit looks like this:-
simulate this circuit – Schematic created using CircuitLab
At the moment the FET switches off the battery current will start dropping, but this induces a voltage across the inductor which prevents the current from dropping instantly. The current then flows through the bulk capacitor which drops voltage across its internal resistance, raising the input voltage of the controller.
If the current was 45 A and the capacitor ESR was 1 Ω then the voltage would momentarily rise by 45 V. Since the capacitor is already charged up to battery voltage, the controller input voltage would rise to 14.8 + 45 = ~60 V. If the FET is only rated for 30 V then you have a problem! When the FET is turned on a similar action occurs, only this time the controller input voltage drops - possibly low enough to upset its operation - or even go negative and blow up components. So the main thing you need is low enough ESR to keep the voltage spikes down.
Secondary requirement is enough capacitance to not charge significantly as the inductance discharges. If that happens you get ringing, which can raise the peak voltage even with (or even more with) low ESR. Increasing capacitance lowers Q and reduces ringing.
For normal wiring lengths with the wires close together to minimize loop inductance, if Al electrolytic capacitors are used then once you have low enough ESR the capacitance will probably be large enough. So just calculate the required ESR, eg.:-
FET voltage rating 30 V, derate to 25 V for safety. Maximum pulse current 45 A, maximum battery voltage 16.8 V, maximum permissible voltage rise 25 - 16.8 = ~8 V. 8 / 45 = 0.18 Ω total ESR.
Final issue is capacitor ripple current, which depends on battery ESR, wiring inductance, and PWM frequency, as well as capacitance and capacitor ESR. We could do all the calculations to work it out by hand, but it would be tedious. To calculate wiring inductance, go here. A good simulator can do the calculations for you if everything is set up right, but it might be quicker and easier to just blindly throw as many capacitors on as you can and see what happens!