# Electrical – Sequence Detector with multiple inputs

digital-logicsequence-detectorstate-machines

The question:

Design an automaton that receives inputs X0, X1 and produces outputs Z0, Z1.

• Z0 is 1 If the last two bits of X0 are the complement of the last two received on X1.

• Z1 is 1 If in the last two bits of X0 and X1 there is an even number of 1

Example:

``````X0 0 0 1 1 0 0 1 1 0
X1 0 1 0 0 1 1 1 1 0
Z0 - 0 1 1 1 1 0 0 0
Z1 - 0 1 1 1 1 0 1 1
``````

I have problem to solve this type of question. I'm tried many times to solve this type of problem but I couldn't.
This is not homework, it's a question from my last exam.

This isn't really a sequence detection problem. All you need to do is remember the previous state of each input (two DFFs). The rest is combinatorial logic on those bits combined with the current value of each input (four 2-input gates).

Solution: Explanation:

Note that A is high if the current inputs are different, and B is high if the previous inputs are different. Therefore, a simple AND gate provides the Z0 output if both of those are high.

But note that A also indicates whether there's an odd number of ones in the current inputs, and B also indicates whether there's an odd number of ones in the previous inputs. If both of these are high, or both of them are low, then there's an even number of ones in the current and previous inputs. One additional XNOR gate provides the Z1 output.