I am designing a simple Buffer to get the voltage of a high-impedanze source to an ADC (60k Impedance).
For that I choosed an JFET in the source-follower configuration.
simulate this circuit – Schematic created using CircuitLab
To bias the gate to ground and keep the input-resistance high, there will be an >1Meg Gate-Risistor.
I am a little bit confused about how to select the Source-Risistor, because the Output-Voltage (Voltage at the source) should be nearly independend of the load. So it should not matter, if I am using a 1k or 100k resistor, does it?
Some resources say, with Rs, you bias the JFET.
Could someone please clarify this to me?
A second Question:
To get better linearity, I may use a current Source at the Source (biasing the Gate to Vcc/2 with a single supply-voltage)
What is the approach to choose a current for that?
Thanks for any advice
Best Answer
Indeed, with \$R_S\$ you choose the DC operating point of the JFET. An n-type JFET will start conducting as soon as the voltage \$V_{GS}\$ between gate and source is higher than some negative pinch-off voltage \$V_P\$ that depends on the type of the transistor. From this point, the drain current will rise quadratically with \$V_{GS}\$,
\$I_D=I_{DSS} \left( 1-\frac{V_{GS}}{V_P}\right)^2 \$,
where \$I_{DSS}\$ is the drain current at \$V_{GS} =0\$. Therefore \$V_{GS}\$ is usually negative. Since the gate is at ground level (due to \$R_G\$), the source must be positive. This is done by \$R_S\$, since \$V_S = I_D\cdot R_S\$ and finally \$V_{GS} =-I_D\cdot R_S\$.
So \$I_D\$ depends on \$V_{GS} \$ and \$V_{GS}\$ depends on \$I_D\$ and on \$R_S\$. The value of \$R_S\$ for a given \$I_D\$ can be found either graphically or by solving the equation. Small changes in the transistor parameters (\$V_P\$, \$I_{DSS} \$) will not have a huge effect on \$I_D\$.
A simple recipe: Choose an \$I_D\$. For a source follower, a good starting point would be \$I_D\approx I_{DSS}/2\$. From the formula above (or from the characteristic curve of the transistor), determine \$V_{GS} \$. Finally, \$R_S=-\frac{V_{GS}}{I_D} \$ (remember that \$V_{GS} \$ will be negative).
However, with a source follower the gate is usually not set to 0 volts. Instead, a voltage divider is used to set the gate voltage so that the source terminal is at about half the supply voltage.