Electrical – SPI EMC Design guideline

emcspi

I currently have a system consisting of two PCB connected via a 5 cm cable.

Each PCB has a microcontroller, the two microcontrollers are communicating via SPI at 1Mbps Data rate.

Now the system will go into EMC and EMI testing, and i never dealt with a system were i should consider both the sourcing and receiving end, usually i only design the receiving end of the signal.

I considered adding an RC filter in the received signal and a series resistor to the sourced signal but i dont know if this would distort signal, can anyone suggest the best solution to pass the tests?

Best Answer

Radiation will depend mainly on two things.

The rise and fall time of your signals You can control this with something as simple as a series resistor at the driver output, or with a filter. The series resistor essentially creates an RC filter where the capacitance is provided by the load. If you're not using impedance-controlled lines, I wouldn't call this "termination" but rather just "rise-time control".

Given your 1 Mbps data rate, you should be able to increase rise and fall times to 100 or 200 ns without degrading performance, and this will substantially reduce the high frequency content of the signals.

The loop area between signal and ground wires in the cable You can minimize this by assigning wires in you ribbon cable (assuming it's a ribbon cable) in GSGSGSG arrangement, so each signal line has two ground wires as close as possible to it. With some experimentation you could likely reduce the number of ground wires, but that's a difficult change to make after you've already built your PCBs.

Edit: In comments you said, "the test would be done for emission and immunity, will adding a series resistor also help in immunity?"

In my experience an SPI circuit with ~5 cm trace length is not likely to fail radiated immunity testing.

However, I've never slowed down a rise time as much as I suggested doing above. Purely resistive edge rate slowing will degrade immunity as you suggested. Adding capacitance at the load end of the trace will improve immunity, but it will also require more current through the cable during transitions so it will degrade radiation. I think with your problem parameters you would be able to find a balance between the two that passes testing, provided you also have some kind of shielding around the whole circuit.

If this is a "one chance to get it right" problem and you don't mind a few extra dollars in costs, then one options is to use CMOS-to-LVDS translators and send the SPI signals over the cable as differential signals rather than single ended. This will improve both radiation and immunity. You could also design in the option to add common-mode chokes on the differential signals to further improve both.

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