Electrical – Using only NAND and NOT gates to represent a logic function that isn’t an SOP/POS

The best way for a beginner is to think about each term separately and how you would create that with a NAND gate.

Let's start with the basic NAND gate truth table:

A | B | Q
---------
0 | 0 | 1
1 | 0 | 1
0 | 1 | 1
1 | 1 | 0

Now let's look at each term. We have a NOT, and AND, and an OR in there. So, how can we make those with NAND gates? Start with the NOT.

How does a NAND look like a NOT? Simple - when both inputs are the same. If you tie A and B together so they always see the same signal, then you have a NOT gate. 0 nand 0 = 1, 1 nand 1 = 0. So the NOT gate can just be:

^{simulate this circuit – Schematic created using CircuitLab}

Next the AND. What's a NAND? It's an inverted AND. And AND with a NOT after it. So we just want to get rid of the NOT, and you can do that by adding another NOT:

^{simulate this circuit}

Then comes the OR. Look closely at the NAND table and compare it to the OR table:

A | B | Q
---------
0 | 0 | 0
1 | 0 | 1
0 | 1 | 1
1 | 1 | 1

Do you see a similarity? If you were to invert the A and B values the table would instead look like this:

A | B | Q
---------
1 | 1 | 1
0 | 1 | 1
1 | 0 | 1
0 | 0 | 0

And that's the same sequence for Q as the NAND gate. So an OR gate is just a NAND gate with the inputs inverted. And we know how to invert already. So the OR looks like:

^{simulate this circuit}

So now you know what the gates look like you can put the whole thing together:

^{simulate this circuit}

However there's too many gates there. It can be simplified. The bit I have marked with a box - a NOT followed by a NOT - that's completely pointless (from a logic point of view) and is just wasteful. It serves no purpose. So you can get rid of it. Simplify to:

^{simulate this circuit}

CMOS parts like the 4011 have a very high input impedance and will have a random value if left unconnected.

If you are connecting your switches between an input pin and the positive supply, you need a pull-down resistor (10K or so will do) to ensure that the input will be low when the switch is open. If your switches are between the input pin and ground, use a pull-up to the positive supply to make the inputs High when the switch is open.

Also, any unused inputs must be connected to either the positive supply or ground to ensure they don't sit at a "maybe" state and cause the input circuit of the gate to draw excessive current.

You don't need any resistors between the gates.

As one comment says, it is good practice to have 0.1 uF bypass capacitors between the power supply and ground at each IC - more important with flip-flops and other clocked logic than with simple gates, but it is good to get in the habit...

^{simulate this circuit – Schematic created using CircuitLab}