It depends on how you define 'computer'..
On the smaller end of the scale, what you might call traditional micro-controllers, you don't get memory management and seldom see any more RAM than the tiny amount embedded in the chip. I'll admit to very little knowledge about the architecture of the more capable micro-controllers now available, but the existence (or lack thereof) of these features is probably key to distinguishing between a device best suited for embedded applications or for general purpose computation.
By 'memory management' I'm referring to the capability to run programs in virtual address spaces and map these to the physical RAM available in the system, a function carried out by what's usually called a memory management unit (MMU).
Without an MMU, if you try to run multiple processes, all of them are forced to share a single address space, and this means that unless all processes involved adhere to your memory allocation scheme, one process can very easily crash another. So if you're in total control of designing all the processes, as with an embedded system, this isn't as much of a concern. However, if you're trying to support general purpose computation, you can't guarantee that all the code that will be executed will respect the memory allocation scheme, and the system will be rather fragile.
Lack of RAM is also not much of a problem for embedded systems, (1) because there's usually lots of flash, and (2) not being a general purpose computer means you don't have to worry about running un-anticipated programs at the behest of a user. You know ahead of time the sum total of all the software that will run on the system, and only need RAM for variables for that software. When you try to make your system into a general purpose computer, though, users are going to expect to be able to run whatever suits them, and this requires RAM.
Now, it's absolutely fine to do general purpose computation on devices without an MMU, and not much memory. The original 128K RAM, 8088 based (16 bit) IBM PC got away with this, as long as you only needed to run one program at a time.
So if you want to define 'computer' as something like 1982 technology, the answer is definitely yes. Or if you have a closed system where you can mitigate the problems of not having an MMU and/or much ram (e.g., cell phones) by carefully controlling the design of the software, also yes. Or, if your micro-controller has a built-in MMU and gobs of RAM (or can accommodate these externally), you should be able to construct a system that more resembles current computers.
There are many different kinds of computer architectures.
One way of categorizing computer architectures is by number of instructions executed per clock.
Many computing machines read one instruction at a time and execute it (or they put a lot of effort into acting as if they do that, even if internally they do fancy superscalar and out-of-order stuff).
I call such machines "von Neumann" machines, because all of them have a von Neumann bottleneck.
Such machines include CISC, RISC, MISC, TTA, and DSP architectures.
Such machines include accumulator machines, register machines, and stack machines.
Other machines read and execute several instructions at a time (VLIW, super-scalar), which break the one-instruction-per-clock limit, but still hit the von Neumann bottleneck at some slightly larger number of instructions-per-clock.
Yet other machines are not limited by the von Neumann bottleneck, because they pre-load all their operations once at power-up and then process data with no further instructions.
Such non-Von-Neumann machines include dataflow architectures, such as systolic architectures and cellular automata, often implemented with FPGAs, and the NON-VON supercomputer.
Another way of categorizing computer architectures is by the connection(s) between the CPU and memory.
Some machines have a unified memory, such that a single address corresponds to a single place in memory, and when that memory is RAM, one can use that address to read and write data, or load that address into the program counter to execute code. I call these machines Princeton machines.
Other machines have several separate memory spaces, such that the program counter always refers to "program memory" no matter what address is loaded into it, and normal reads and writes always go to "data memory", which is a separate location usually containing different information even when the bits of the data address happen to be identical to the bits of the program memory address.
Those machines are "pure Harvard" or "modified Harvard" machines.
Most DSPs have 3 separate memory areas -- the X ram, the Y ram, and the program memory.
The DSP, Princeton, and 2-memory Harvard machines are three different kinds of von Neumann machines.
A few machines take advantage of the extremely wide connection between memory and computation that is possible when they are both on the same chip -- computational ram or iRAM or CAM RAM -- which can be seen as a kind of non-von Neumann machine.
A few people use a narrow definition of "von Neumann machine" that does not include Harvard machines. If you are one of those people, then what term would you use for the more general concept of "a machine that has a von Neumann bottleneck", which includes both Harvard and Princeton machines, and excludes NON-VON?
Most embedded systems use Harvard architecture.
A few CPUs are "pure Harvard", which is perhaps the simplest arrangement to build in hardware: the address bus to the read-only program memory is exclusively is connected to the program counter, such as many early Microchip PICmicros.
Some modified Harvard machines, in addition, also put constants in program memory, which can be read with a special "read constant data from program memory" instruction (different from the "read from data memory" instruction).
The software running in the above kinds of Harvard machines cannot change the program memory, which is effectively ROM to that software.
Some embedded systems are "self-programmable", typically with program memory in flash memory and a special "erase block of flash memory" instruction and a special "write block of flash memory" instruction (different from the normal "write to data memory" instruction), in addition to the "read data from program memory" instruction.
Several more recent Microchip PICmicros and Atmel AVRs are self-programmable modified Harvard machines.
Another way to categorize CPUs is by their clock.
Most computers are synchronous -- they have a single global clock.
A few CPUs are asynchronous -- they don't have a clock -- including the ILLIAC I and ILLIAC II, which at one time were the fastest supercomputers on earth.
Please help improve the description of all kinds of computer architectures at
http://en.wikibooks.org/wiki/Microprocessor_Design/Computer_Architecture
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Best Answer
The absolute minimum of parts you need is just the 65(C)02 CPU and a handful of resistors. It's possible to pull the data lines up/down to always read as a single value (e.g, 0xEA, the NOP opcode), causing the processor to run that instruction endlessly. Information on this trick can be read here.
Running any real program will require somewhere to store it, though. So you'll probably want an EEPROM.
Any meaningful program will need some RAM, so you will probably want some SRAM. Selecting between the two will require some sort of address decode logic. There are a number of ways to implement this, but probably the easiest is to use logic gates on the top few address lines to generate chip enable signals for the SRAM and EEPROM chips. (For instance, for 32K RAM / 32K ROM, A15 could be used directly as a chip enable for ROM, and ~A15 for the RAM.) More complex address layouts may merit the use of a PAL for address decode.
You will also probably want some way of communicating with the world. How you do this is up to you; some easy options include:
Any of these options will require that you reserve a range of memory for the peripheral in your memory decode logic.