Electrical – Why is the maximum efficiency of a push-pull amplifier 78.5%
amplifierpush-pull
One of the practice questions for my upcoming test is this:
After some googling, it seems like the correct answer is A. But why?
Best Answer
It is good to review this.
@Barry gives the good answer. Am attempting a more graphic solution using LTSPICE. The assumption is that a sine wave is the signal source, whose peak voltage just grazes the DC power supply that powers the Class-B output device(s). This is unrealistic, because any transistor has some overhead voltage drop: at least its saturation voltage. The answer assumes it is zero, and the transistor works linearly all the way through the sine wave peak.
In this simulation, a sine wave current source of one amp is fed to a load resistor of two ohms. The peak voltage at this load resistor reaches 2V. So a 2V DC power supply is required to power this Class-B simulation. It can only do the top half of the sine wave - only one quarter cycle is scanned from a 1Hz source.
Below is a plot of power vs. time. One trace shows power dissipated in R1, while the other shows power dissipated in I1: The result of the two LTspice measurements shows the average power during the quarter-second run:
p_source: AVG((2-v(n002))*i(i1))=0.273242 FROM 0 TO 0.25
p_r1: AVG(v(n002)*v(n002)/2)=0.999993 FROM 0 TO 0.25
Efficiency for your question seems to be defined as p_r1/(p_r1 + p_source)
That is: 1/(1 + 0.273242) = 78.54%
Note that for every watt dissipated into the load resistor, 0.273W is dissipated in the pull-up transistor, but that only lasts for half a cycle. During the next half cycle, this top transistor (it might be a PNP) dissipates nothing.
During the bottom half cycle (while the PNP dissipates nothing), the NPN would take over, and dissipate a similar 0.273W. So the PNP and NPN share power dissipation, each taking half of the 0.273W.
Don't forget, this is a unrealistically ideal case.
Its not the biasing - in fact there is no problem.
That circuit is not a voltage amplifier, its a current amplifier - the key feature being that both of your transistors are configured as emitter-followers (gain ~ 1).
What you have there is a common configuration for the output stage of an audio amplifier because it can drive lots of current into your speaker.
You need to add a voltage gain stage in front of it in order to amplify your 100mV signal into something that the output stage can use.
The easiest way is to cheat and use an opamp...
Best Answer
It is good to review this.
@Barry gives the good answer. Am attempting a more graphic solution using LTSPICE. The assumption is that a sine wave is the signal source, whose peak voltage just grazes the DC power supply that powers the Class-B output device(s).
This is unrealistic, because any transistor has some overhead voltage drop: at least its saturation voltage. The answer assumes it is zero, and the transistor works linearly all the way through the sine wave peak.
In this simulation, a sine wave current source of one amp is fed to a load resistor of two ohms. The peak voltage at this load resistor reaches 2V. So a 2V DC power supply is required to power this Class-B simulation. It can only do the top half of the sine wave - only one quarter cycle is scanned from a 1Hz source.
Below is a plot of power vs. time. One trace shows power dissipated in R1, while the other shows power dissipated in I1:
The result of the two LTspice measurements shows the average power during the quarter-second run:
Efficiency for your question seems to be defined as p_r1/(p_r1 + p_source)
That is: 1/(1 + 0.273242) = 78.54%
Note that for every watt dissipated into the load resistor, 0.273W is dissipated in the pull-up transistor, but that only lasts for half a cycle. During the next half cycle, this top transistor (it might be a PNP) dissipates nothing.
During the bottom half cycle (while the PNP dissipates nothing), the NPN would take over, and dissipate a similar 0.273W. So the PNP and NPN share power dissipation, each taking half of the 0.273W.
Don't forget, this is a unrealistically ideal case.