Why is there a non-zero phase error in a second order PLL even though there is an integrator in the loop (type-1 system)? The same transfer function is applicable whether frequency or phase is considered as the input. Why then, under locked condition,steady state error for a step-change in frequency is zero but is non-zero for phase?
Electrical – Why is there a non-zero phase error in a second-order PLL
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Related Solutions
If input frequency and feedback frequency (after dividing) are the same then the PLL is potentially going to fall into a state of in-lock because the phase detector doesn't care about phase differences that are multiples of 2\$\pi\$: -
As the "wandering" clock leaves perfect phase alignment with the static clock (left side), the EXOR output starts to produce thin pulses that become wider as the the wandering clock leads the static clock by greater amounts. At perfect anti-phase between the two clocks the EXOR output is a constant "1" and as the leading extends even more, the EXOR output repeats itself as the phase difference between wandering clock and static clock is 2\$\pi\$ (right side).
Use a master oscillator running at four times the grid frequency, and divide it down to 4 quadrature signals. Lock one of them in phase to your reference. Another will then be at exactly 90 degrees to it.
simulate this circuit – Schematic created using CircuitLab
A lot of this can be integrated into a 4046 IC, the phase detector and clk oscillator and parts of the loop filter. All you need to add is the /4 shown as the two D registers. An HC74 would be the ideal component for this.
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Best Answer
A frequency step is identical with a ramping phase (phase is the time integral over frequency). Therefore, speaking about phase errror (for a frequency step) we do NOT speak about a "static" but about the "dynamic" error (or phase "tracking" error).
Applying the "Final Value Theorem", we find that (a) for a simple lag-filter we have a finite (tracking) phase error, but for a PI filter the dynamic phase error is zero.
Explanation (Loop gain): LG(s)=H(PI)*H(VCO)=K1(1+1/sT1)*K2/s.
Because of Delta(phi)=Delta(w)/s the "s" in the denominator of LG(s) cancels and the "Final Value Theorem" for the phase-transfer function (with s=0) gives a finite (correction: infinite !)value for the loop gain LG in case of a PI controller).