Electrical – Why isn’t atmega8 using the internal oscillator at 8MHz by default

Yes, look at setting the fuse bits to use the internal oscillator rather than an external crystal. Using the OSCCAL register you can even fine tune the internal RC oscillator on the arduino to mimic your ATtiny2313. Once you have done this

If the Internal Calibrated RC Oscillator is used as chip clock source, PB7. . .6 is used as TOSC2...1 input for the Asynchronous Timer/Counter2 if the AS2 bit in ASSR is set.

See page 3 and page 84 of the datasheet for the ATmega328P which is the microcontroller on your arduino.

Response to Comment Oh, I might be misunderstanding your question. The fuses are 'one-time' with respect to your program in that once they're set and your program is running they can't be changed anymore until you reprogram. They are used to select which clock source is being used.

However, they can be set many times if you are trying to simulate your program at different clock frequencies. Oh and to the last part, I don't believe there is a way to change the fuses with an USB/FTDI programmer. For more information on fuses, see here.

If you're asking if there is a way to change the fuse settings through the arduino board I believe the answer is no. You need to use an something like the STK-500 or AVR-ISP mkII. Also note, these programmers also plugin to your USB port on your computer, but they do not use the FTDI chip like the arduino board does.

What is the ADC Clock?

The section that you are seeing is for the clock used for the ADC. This clock is not directly related to the max sampling frequency though. The clock is what is actually being fed to the ADC module which needs to be faster than your sampling so that it can handle some magic for you.

How does the Max clock relate to the max sampling frequency?

What the datasheet is saying is that in order to get 10 bit resolution your clock can not be any faster than 200 KHz. When your clock is at that speed, you will be able to sample your signal at 15,000 samples per second.

If you don't need all 10 bits of resolution then you can provide the ADC with a faster clock and you will get a faster sampling rate, but the datasheet is not clear as to how fast you can go and still get 8 bit resolution.

I would assume that the clock to sample rate ratio is fixed, so 200K/15K = 13.33 which means you can go as low as 50 KHz clock resulting in 3.75 kSPS.

Why a minimum clock to get a 10 bit sample?

The ADC module is doing a sample and hold in which the voltage is essentially held in a capacitor. If you slow the clock down too much, the voltage can start to bleed off of the capacitor before a complete sample is performed. This change in voltage makes it such that you can't get all 10 bits accurately.

So what does this all mean?

According the the Nyquist-Shannon sampling theorem your sampling frequency needs to be at least twice the maximum frequency in your signal. You can learn more about why by looking at this question: Puzzled by Nyquist frequency

So in order to get 10 bits of resolution, the max your signal can be is 7.5 KHz, but if you need to sample a signal faster than that, you can, but the datasheet does not mention how high you can go or how much it hurts your resolution.