I am currently designing a device which internally consists of two circuit boards inside a fairly large, grounded metal enclosure. I'm designing one of the boards myself, the other is a bought part which communicates via UART over a pin header connector (ideal for connecting ribbon cable). I'd like to be able to use the 115200 baud speed, but that's not an absolute requirement.
The bought part is available in two versions – one with 3.3V UART and one with proper RS232 voltage levels. Using the 3.3V version would simplify my own board a bit (no need for a MAX(3)232), but I am wondering whether that might have a negative impact on the robustness of the transmission, especially since the device will have to pass an EMC test.
Since I'm a novice electronics designer, I don't have a good intuition for this yet. Do you think the 3.3V level is sufficiently robust over a ~20cm ribbon cable, provided I don't run it right next to the power supply?
Would you recommend putting a ferrite around both ends of the cable? The supply for the secondary board is over the same cable, so I'd expect the sum of currents over that cable to be 0 for all "good" signals, except for high frequency signals, which can run directly to the chassis ground via a 1nF capacitor.
Best Answer
EMI is NOT about data rate. It is about EDGE rate. The rise time of your signal edge is the determination of the frequency content of your signal.
I know of a company with very poor board layout for high speed signals. But they were using a 40 kHz clock. However, as chip fab is pushing for smaller and smaller feature size, the rise times have increased. With new versions of the "Same old chip they always used" the circuit was failing. The edge rate was giving them frequencies on the board closer to 100 Mhz.
Look at your edge rate with the chips used. If it is possibly a problem, you can do things to limit the edge rate, such as using series termination resistors. Ferrite beads will help kill common mode currents, but it would be far better to not have them.
Don't route any high speed signals on your board close to and parallel with the serial data lines. This is a common error that allows induced high speed signals to extend onto a good antenna for EMI issues.
Once you get above 100 kHz, return current will exist on the closest conductor available. i.e. It will be on the return path that has the highest capacitive coupling and lowest inductance. Higher frequency current flows in fields. This means that current starting down a trace or wire will immediately capacitively couple to whatever return path it finds and induce an opposite direction current. When this is not properly provided, the capacitive coupling will be done in the air with as far a reach as is needed. This is where massive EMI is created.
This is important in both PCB layout and wiring. When possible, give each signal its own current return path. For example, you could have your serial link cable as:
[GND][TX][GND][RX][GND][3.3V] and with a adhesive shield layer if possible.
Depending on what your volumes are or certification needed, it can make sense to get some equipment to do a quick and dirty check of EMI. The $1,500 Rigol DSA815 with some near field probes can give you a great deal of information about problem areas. Also, a large sheet of metal and a LISN can give you a good idea of conductive EMI. These won't give you certification level results, but you can quickly spot possible issues.