# Electronic – 50Ω Impedance Matching with Signals Through Vias

pcb-antennapcb-assemblypcb-designRF

I'm working on an IoT board and it is all laid out (LTE, GPS, BLE, WIFI – 30mm x 30mm — VERY TIGHT).

As a design concession, I have to use vias to route some of the RF signals. There's no other way to keep the board that small.

I've impedance matched and tuned several RF boards. I'm using the same PCB material, so I am confident the 50Ω traces will be correct. And I have a VNA to tune the matching network to the antenna.

However, what happens when the 50Ω traces hit a via?

Is there an known equation for impedance matching through vias?

Should I even worry about it if the traces are 50Ω?

I have a matching network from signal out on the IC to the antenna, so is it a moot point? Just use whatever via you want, and correct the impedance at the matching network?

However, what happens when the 50Ω traces hit a via?

The via can act as a capacitive or inductive discontinuity in the transmission line. It will make at least a small reflection.

Below 1 GHz, this discontinuity is usually too small to worry about unless you're doing something like precision radar work. Above 5 GHz, you'd generally want to carefully design your via to maintain impedance matching as well as possible. 1-2 GHz is kind of a messy middle ground where you might get away with an unmatched via and you might not. So you probably at least ought to make a best effort at designing a matched via.

First, you want to minimize any via stub. If you can, route from the top to the bottom layer, not from layer 1 to layer 3, for example. If you can't, expect a capacitive discontinuity from the stub. It's possible to "back-drill" the via to eliminate most of the stub, but that's probably not justified at 2.5 GHz.

Second, if you aren't routing between layers that share a ground plane (for example layer 1 and layer 3 might both use layer 2 as their ground plane, but layer 1 and layer 8 don't), then make sure there is a nearby path for return currents to move between the ground planes of the two signal layers. One nearby ground via is okay. Two or three is even better. If one layer uses a power plane as its reference, then place a bypass capacitor for that power net near your via.

Third, you can use a tool like the Saturn PCB tool (google it) to design the via diameter and antipad diameter around it as it goes through power and ground planes, to give the via a characteristic impedance matching your line.

Is there an known equation for impedance matching through vias?

There are at least heuristic formulas. Tools like Polar or the Saturn PCB tool can be used to find the via's characteristic impedance, which depends mainly on the via diameter and the antipad diameter.

Should I even worry about it if the traces are 50Ω?

At 15 mm trace length and 2.5 GHz, you're over 1/10 wavelength in trace length. It's probably a good idea to make controlled impedance traces, but it will probably not be too critical to get everything exactly right.