Simply put, a multiplexer selects one of its inputs and routes it through to the output.

S1 and S0 can be combined to create a 2-bit binary number. That number, when converted to decimal, corresponds to one of the 4 inputs, and that is the input that is then routed through to the output. For instance, if you have S1 = 1 and S0 = 0, that is the binary number 10_{2}, which is 2_{10}. So input 2 would be routed to the output.

The general truth table looks like this:

```
S1 | S0 | I0 | I1 | I2 | I3 || Out
----------------------------------
0 | 0 | X | X | X | X || I0
0 | 1 | X | X | X | X || I1
1 | 0 | X | X | X | X || I2
1 | 1 | X | X | X | X || I3
```

The "X" means "Don't Care", or more strictly "This value doesn't affect the results of the truth table". The output value as "I0" etc indicates that "The output is whatever this input is set to".

Taking your multiplexer from above, with a specific (fixed) set of values on the input pins (1, 0, 0, 1), the full expanded truth table would look like this:

```
S1 | S0 | I0 | I1 | I2 | I3 || Out
----------------------------------
0 | 0 | 1 | 0 | 0 | 1 || 1
0 | 1 | 1 | 0 | 0 | 1 || 0
1 | 0 | 1 | 0 | 0 | 1 || 0
1 | 1 | 1 | 0 | 0 | 1 || 1
```

If you were to take S1 and S0 as the inputs to some unknown logic gate, and examine the output from it to determine what the gate was, so ignoring the I0-I1 pins since they are fixed, you can equate that table to another known truth table. Let's collapse it by removing the static input values:

```
S1 | S0 || Out
--------------
0 | 0 || 1
0 | 1 || 0
1 | 0 || 0
1 | 1 || 1
```

The output is high when both the inputs are low or both the inputs are high, and the output is low when one and only one of the inputs is high and the other one is low. That sounds familiar to me. That sounds like the XNOR gate to me (an inverted XOR gate).

Of course, change the combination of values on the input pins, and you can change the way the output works. Just by inverting the whole of the inputs, so you have 0, 1, 1, 0 instead, will completely invert the output values, so the XNOR becomes an XOR. A different combination could make it look like an AND gate, or an OR gate, etc.

In this mode, where it is able to emulate any single low-level gate, is known as a "look-up table" where, instead of actually performing a logic function, it uses values to "look up" another value from another place, in this case the input pins.

Look-up tables are used extensively in FPGAs and other similar programmable logic, where the output of a logic cell can be, to a large extent, pre-programmed into a block of memory, and the incoming values just look up the output value in that memory. Just like a very large multiplexer.

## Best Answer

Canonical form basically holds every variable in its group.

So if you have three variables named A, B and C, your SoM could be

`A~BC+~ABC+AB~C = Y`

.Now you can simplify this to reduce the number of variables in the equation. This simplification is easy for us to solve manually. But for a computer, it needs to know the A, B and C values as a group (

`101+011+110`

from the example above). Because of this, canonical form holds significance.If you simplify, it just becomes a normal Boolean expression and not a canonical form