There seem to be a number of different definitions of flip-flops and latches out there, some of which are contradictory.
The Computer Science text book for the course I teach is probably the most confusing (in fact I have little faith in the book because it’s just plain wrong in several places).
I am comfortable with the workings of latches (SR, gated SR, gated D), and the difference between level triggered and edge triggered devices, at least in terms of logic gates and timing diagrams. However, I am still looking for a concise definition of a flip flop and of a latch.
This is what I believe so far:
“A flip flop is an edge triggered bi-stable device that can store 1 bit”.
“A latch is a level triggered bi-stable device that can store 1 bit.”
I’ve had a look at previous posts on this website about this and, as enlightening as they are, I am still looking for something definitive.
My current understanding, which I want to check, is in the diagrams below…
Side by side are what I understand are two implementations of a level triggered gated D latch.
Below these is a positive edge detector, at that brief moment when the NOT gate has not yet responded to the change input from low to high, namely the rising edge (red is 1 blue is 0).
In the last diagram, the edge detector has been fitted to a dated D latch and this is what makes it a flip-flop.
Is the last diagram really a flip flop, or is it still just a latch?
And why do we need the master slave version given, that this device is so much simpler?