If the internal ADC of your microcontroller performs the job you need it to then no, there is no need for external ADCs. But then, that's not who they're aimed at.
You have covered most of the reasons for an external ADC, but there are a few more, and in my opinion, they are some of the most important reasons:
- You need a different sampling technology - for instance the internal ADC is SAR, but you need to do Delta Sigma.
- The internal ADC, because it is internal, and shares the same die as the main MCU, will never be 100% free from the noise of the rest of the MCU, so an external one would be possible to make ultra low-noise
- Your microcontroller / SoC / FPGA of choice has no ADC. The latter two are most likely - most common SoCs and FPGAs don't have any ADC at all. Yes, you can get ones that do, but many don't. So you add an external one.
For point 3, take the Raspberry Pi for example. That has no ADC available at all, you have to add an external one to do any analog work at all.
If you wish to have the same number of samples per second, then you will need to peruse the datasheets very closely. What you specifically mean by 'simultaneously' needs clarification. All I can show you here is how to achieve correlated samples at the same rate.
The ADS1158 shows (datasheet figure 128) shows a fixed channel mode at its simplest with the data rate at Fclk/128. This appears to be the sample rate.
The ADS1191 is optimised for sample rates of <=8kS/s. Using the 8kS/s rate would therefore be the best you can achieve, according to the manufacturer.
There is an option for an external clock on both, so lets see what you can do.
The ADS1191 accepts a 2.048MHz clock (see the datasheet for details of pin connections as the modulator is expected to run at 128kHz).
To get the 8kS/s rate from the ADS1158 in the simple mode above, yields a master clock of 1.024Mhz. Note that there are limited options to change the sample rate in this part
This is fortunate: Generate a master 2.048MHz clock for the ADS1191 and divide it by 2 to yield the external clock on the ADS1158.
If you now start each conversion at the same instant, you will get conversions that take the same amount of time, and the sample rate is correlated.
Note that the 2.048MHz clock for the ADS1191 was only implemented to enable faster SPI access - you should not attempt to run the modulator above 128kHz.
[Update in response to comment]
I suggested a master clock because that was one method of achieving the desired result; as you note, there are other methods.
A D type flip flop with #Q to D is indeed a standard way to divide a clock by 2.
HTH
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