Can you post your sub-sheets?
From looking at what you have posted, I think you may have a typo in the entry: RB[0..7]. You typically get the red line below the entry when it is not correctly tied to a port on the child-sheet.
Right-click on the sheet symbol, and select "Sheet Symbol Actions" -> "Synchronize Sheet Entries and Ports"
Anyways,
I created a simple, minimal test schematic to do what you are doing:
Top Sheet:
Sheet 1:
Sheet 2:
Project Hierarchy:
And it properly connected the nets across the different schematics:
For what it's worth, I am fairly sure you have to both name the buses with net-labels on each child-sheet, and name the ports.
Also, the bus name and wire names have to have the same prefix:
For example, a set of wires HERP0 HERP1 HERP2 HERP3 HERP4 has to be in a bus named HERP[0..4]. It may also have to be zero-indexed (i.e. start at 0, rather then 1), but I'm not totally positive on that.
Also, I do indeed get the "Net NetName has multiple names" warning, but it's just that, a warning. You can turn the warning off, or just ignore it. I tend to leave it on, and before I have a board produces, go through all the warnings and make sure that I intend for whatever they refer to to be that way.
Best Answer
The hierarchical setting relates to using multiple sheets (you're doing that and that's perfectly fine).
Your nets have the same name, this is why Altium warns it. Altium wants to tell you: Hey, you have two nets which are separate but have the same name - you should actually connect them because if you transfer the design to the PCB, those will be connected (as they have the same name).
The only way you can counter it is by giving them different names such as CAN_DISP_RX and CAN_BUTTON_RX. This will make sure that once you transfer them to the PCB, they will be separate nets (as you intend).
The settings in the project options basically deal with how you need to connect signals with each other. Strict Hierarchical will tell you that neither Ports nor Power objects are global, you will need to connect every signal through a port (this can be useful for designs with multiple separated power section if you're using Altium's multichannel feature). Hierarchical is the default for everything with more than a single sheet and will keep power objects global but all other signals must be unique or connected through ports. Flat tells you that you don't need a hierarchical structure but basically connects every port an every sheet to every other port on any other sheet with the same name (whereas for hierarchical you need to explicitly specify this connection on a top sheet - you can have multiple levels). Global is basically the worst of all, it connected everything that has the same name to each other, no matter if it's a net label or port (In my past 10 years I've always used Hierarchical with a single exception of Strict Hierarchical).
Yet, these options never affect the design transfer from schematic to PCB (which is where your error above will happen if you do not assign different net names).