While trying to understand CMOS Logic on Wikipedia for class, I came upon this paragraph which I can't quite wrap my head around on the duality of CMOS:
"An important characteristic of a CMOS circuit is the duality that exists between its PMOS transistors and NMOS transistors. A CMOS circuit is created to allow a path always to exist from the output to either the power source or ground. To accomplish this, the set of all paths to the voltage source must be the complement of the set of all paths to ground. This can be easily accomplished by defining one in terms of the NOT of the other. Due to the De Morgan's laws based logic, the PMOS transistors in parallel have corresponding NMOS transistors in series while the PMOS transistors in series have corresponding NMOS transistors in parallel."
Specifically, what does it mean that "All paths to he voltage source must be the complement of those to the ground"?
And how is this accomplished by defining one in terms of the NOT of the other?
Any explanation would be greatly appreciated, and if you can provide a simple example of this even better.
Best Answer
It's actually quite simple, and it's based on two requirements:
Every node in the signal path must be connected to either Vcc or GND, to be at logical level 1 or 0 respectively;
There should never exist a conductive path between Vcc and GND, else it will short the supply and start draining a lot of current and possibly burning some parts here and there.
Therefore you must make sure that if the pull-up network is conducting, the pull-down is not. Hence their logical function must be the opposite.