You could try creating a "Visual Diff" of your (before and after) design and gerber files. See if anything "jumps out" at you as "the problem." This article describes how to do it.
Also, my personal experience has been that the circumstances where you can confidently get away with going straight to manufacture after a change to a PCB design are rare. For me, it's almost always worthwhile to spend the $20 and wait the extra couple of weeks to have a prototype manufactured before going to a production quantity.
If F1 and K1 are through hole parts, you could put two tracks in parallel, one on each side of the board. Each track would be roughly 10 - 15 mm wide.
Another option, Don't draw the connection as a track but as a polygon or fill. Most of the current will still follow close to the shortest path, but the added area will help to dissipate heat.
Also, be aware that for such short distances, the current crowding to get to the individual pins of your components may dominate the overall resistance of the connection. Using larger holes (requiring components with larger leads) will help with this.
Edit
First, I'm not sure how this plays in, but this ampacity table claims a 0.25 inch trace in 2 oz copper is sufficient to carry 24.5 A with 30 C temperature rise. This is about 1/4 of the number you are coming up with (25 mm). Unfortunately the source is not clear about what assumptions went into their calculations.
Second, the math you added in your edit looks fine.
As you see, increasing the copper area allows you to dissipate more heat. There's no reason you should only increase the area by increasing the trace width. You can simply create a large copper area of whatever shape is convenient the closer to a simple square or circle, the better), so long as it connects your input and output, and the heat will spread readily to allow dissipation over the whole area (with, of course, some concentration in the region where the heat is actually being generated).
Third, no back of the envelope calculation is likely to be especially accurate for these kinds of thermal estimates. If you really want to get a good estimate, you should look into a thermal analysis tool like FloTherm or Ansys IcePak. These tools will both improve the ability to estimate convection effects accurately, and take into account "edge effects" that come into play because your "trace length" is so much shorter than your "trace width".
Best Answer
The main issue I see here is that the U1-U2 GND trace infringes on the isolation barrier in the design. I would shift the P1/P2/R1/R2 complex closer to U1/U2 -- this leaves room to reroute the ground trace to U1 between P2 and the edge of the board, then have it pop out between the pins at the bottom of P1/P2, so it doesn't compromise the isolation barrier U1 and U2 provide.
The other issue with this design is an annoying mechanical matter -- the BTA12-600CW has an isolated tab, but it's only rated to 2500V isolation, which isn't sufficient for a reinforced barrier in 240V land AFAIK, and the heatsink infringes on the isolation barrier otherwise. I'd change it to wrap around the side in an L-shape, with the fins exiting the board envelope altogether -- this increases the mechanical envelope of the design, but keeps the isolation area clear and also allows you to increase creepage and clearance distances from the HS to the TO-220's pins. Either that or find a TO-220(iso) triac with a 5kV isolation rating on its tab and suitable specs otherwise (600V/min 10A). Of course, if you're happy with 2.5kV of isolation here, you simply should make sure the HS has sufficient clearance/creepage to the TO-220 pins.
Another option, depending on how much of an isolation stickler you are, would be to shift the optoisolators left by a couple hundred mils. This would place the existing heatsink firmly on the mains side of the isolation barrier. You may wish to swap the optos for 400mil packaged ones while you're at it, too, as these provide improved creepage, to the full 8mm needed for 240VAC reinforced insulation (surge rating of 5kV).