Electronic – Biasing Class AB power amplifier with MOSFETs

distortionmosfetpower amplifier

I am having trouble getting the resistor biasing to meet a minimum 1.25W at the output:

enter image description here
Note, the distortion and watt meter. I was told the SPICE parameters for the FETs didn't really matter. (Although, I would like to know want to populate some values.)

Anyway, here are my calculations…probably riddled with misconceptions:

\$(P_L = 0.5V_P^2/R_L) → V_P = \sqrt{2R_LP_L}\$

\$\sqrt{2*10*2} = 6.324 V\$ // I picked an output power of 2W.

\$V_{DD} = V_P/0.8 = 7.9 V\$

From the TC6215 complementary pair MOSFET datasheet, N-Channel Output Characteristics:

\$2.5 = K_N(5 – V_{GS(th)})^2\$

\$1.5 = K_N(4 – V_{GS(th)})^2\$

Solving for the two equations:

\$K_N = 7.78 A/V^2\$

and \$ V_{GS(th)} = 4.44 V\$ (Edited because 0.534 V is not the right one.)

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From SPICE diode because I couldn't find it on the diode datasheet: \$I_s = 2.55*10^{-9}\$

Then, the combined diode voltage:

\$ V_{BB} = (amtOfDiodes)*V_T*ln(I_{Bias}/I_{s})\$

\$ V_{BB} = ? = (3)*0.026*ln(I_{Bias}/2.55*10^{-9})\$

How do I find V_BB to solve for the bias current, to solve for the bias resistors?

I don't know what to put for \$V_{BB}\$ in this schematic:

enter image description here

\$ I_{Bias} = 4.77mA\$ (INCORRECT)

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KVL loop from top left down to load:

\$ V_{DD} = RI_{Bias} + V_{GS} + Vo\$

\$ 7.9 = R*4.77m + 0.564 + 4.47\$

→ R = 600 Ω (NOT RIGHT)

Only design specifications

  • \$P_L\$ > 1.25 W (Major problem.)
  • Efficiency > 60%
  • THD < 1.5%
  • \$R_L\$ = 10 Ω
  • 3dB lower frequency < 500 Hz
  • Supply voltages ±15 V (maximum)


Minor Question

Should an input buffer stage be added to minimize distortion:
enter image description here

The voltage drop across resistor R2 provides the bias to Mn and Mp so
that crossover distortion is minimized.

Microelectronics 4e Neamen


EDIT1

I never did figure out how to calculate V_BB (technically V_GG).

enter image description here


Related

Class AB amplifier Design

Best Answer

I never did figure out how to calculate V_BB (technically V_GG).

In theory, the calculations will look something like this:

First, we need to know the MOSFET parameters.

I assumed these parameters:

\$V_{GS(th)} = 3V , K_P = 4 \$ for both transistors.

Nex I pick output stage quiescent current.

I pick this value \$I_Q = 0.1 \cdot \sqrt{\frac{1.5W}{10\Omega}} \approx 40 \textrm{mA}\$

I solve for \$V_{GS}\$

From this:

$$I_D = \frac{K_P}{2}(V_{GS} - V_{GS(th)})^2$$

I get this:

$$V_{GS} = V_{GS(th)}+\sqrt{\frac{I_D}{0.5 \cdot K_P}} = 3V +\sqrt{\frac{40 \textrm{mA}}{0.5 \cdot 4}} \approx 3.14V$$

So, the situation looks like this:

schematic

simulate this circuit – Schematic created using CircuitLab

Notice how I connect the \$Q_2\$ source terminal. In your second diagram, you made a mistake in \$X_2\$.

Your P-channel MOSFET is connected backward.

As you can see our bias voltage is quite large (\$V_{BB} = 6.28V\$). And you will need \$\frac{6.28V}{0.6V} = 11\$ eleven diodes to accomplish the job.
This is why it will be better to use a Vbe multiplier (rubber diode) instead.

schematic

simulate this circuit

And do not try to build this circuit in real life.

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