When bit-banging I2C using 2 PIO lines do these lines still need to be pulled high? Obviously using a dedicated I2C bus the lines must be pulled high as the pins are open-drain outputs but PIO pins aren't open-drain.
Electronic – Bit-banging I2C question
bit-bangi2c
Related Solutions
You're reading the data after clock is low again. You'll have to do that between making the clock high and making it low. After the clock is low the slave is allowed to change the data line, not while it's high.
So reading should be like this:
wait
SCL low
SDA high
for each bit (8 bits)
SCL high <--------
wait
check and store received bit <--------
wait
SCL low <--------
wait
wait
do a NACK or ACK depending on if it is the last byte
Yes. I just recently had an opportunity to test this. You must set the GPIO to Open Drain mode with no pullup but then it works fine. All of the pins that can be I2C pins are qualified to be 5V tolerant according to the ST Micro documentation.
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Best Answer
Yes, both lines need to be pulled high at all time.
Also, when bitbanging I2C, rather than switching the LOW/HIGH states of the pin, switch between LOW/HiZ by simply altering the DDR/DIR registers.