Electronic – BJT in saturation mode equations

There are a few mistakes in the question:

1. The original reference design called for 4K7 (4.7K) ohm resistor for R1. This should fix your problem. Note that the specs for hfe (DC current gain) are typical and not guaranteed, so you need to design in some margin (as was done in the reference design).
2. There was a mistake in your equation: vc=(12.38−25m∗47k) and later vc=(12.38−25m∗10k). You need to use the value of R2 (1K in your schematic). Also note that the result of the calculation is negative but the actual value of Vc will not go below Vce-sat (all other things being correct, a negative value would indicate saturation and the actual Ic would be lower.

The specified 4.7K resistor for R1 should correct the problem.

Edit:

One way of working out an appropriate value for R1 would be to work backwards from the collector. Assuming you want R2 to be 1K (for adequate edge rates for the IGBT in this case):

1. Calculate the saturation current (we'll ignore Vce and call it 0) ... Ic = 12V / 1000 ohm = 0.012A
2. Calculate the necessary base current with some margin (we will use hfe=10 to be safe) ... Ib = Ic / hfe = 0.0012A
3. Calculate the value for R1 needed to achieve the above base current (0.7V assumed for Vbe) ... R1(max) = (12V -0.7V) / 0.0012A = 9417 ohm. With some more margin (allows for temperature, capacitor leakage or ?), 4.7K is a good choice for R1.

The collector junction of Qp and emitter junction of Qn - forward biased.

The collector junction of Qn and emitter junction of Qp - reverse biased.

now the base current of Qn is, $$I_{Bn} = \frac{V_1 - V_{BEn} - V_{CBp}}{R1+R5+(\beta+1)R4}$$ then, $$I_{Cn} = \mathrm{min}(\beta I_{Bn}, I_{Csat})$$ where $$I_{Csat} = \frac{V_1-V_{CEn}}{R_4+R_3}$$

The voltages you can calculate as.

$$V_{En} = R4\times(I_{Bn}+I_{Cn})$$ $$V_{Cn} = V_1 - R3\times(I_{Cn})$$ $$\text{so on ...}$$