Electronic – BJT Puzzler: Common Emitter or Emitter Follower

amplifieranalogbjtpower supply

A few high-reputation members have disagreed on this in the context of other questions, so I thought I'd post it as a separate question.

Question: Is the NPN BJT in this circuit configured as common emitter or common
collector?

enter image description here

Note that, perhaps unusually, the S+ node is ground and the S- node is the
output. 'S' here stands for sense, but for present purposes can be interpreted as \$V_{out}\$.

This is part of an DC Bench Power Supply circuit, and looks like this at the
block level. Note the op amp-ish looking symbol represents the entire amplifier, not the LF411 op amp specifically:

enter image description here

Abstracting out the op amp to a signal voltage source, I believe these two are
each alternate layouts for viewing the circuit. I've purposely laid them out in forms reminiscent of classic common emitter and common collector (emitter follower) respectively.

enter image description here

I don't want to spoil the fun for anyone, so my own conclusion is in the spoiler bar below. Roll your with your mouse to see if you like. This represents my best working conclusion. I still have a shred of doubt in my mind 🙂

Common emitter, more specifically, grounded emitter. The BJT adds gain to the circuit, proportional to the load resistance.

Answers should state the rationale for their conclusion. I think one of the cool features of conundrums like this is it forces one to dig for what is essential in the form, not just recognize it in classical form 🙂

Best Answer

I wasn't going to answer this question, since I had already been through it with an earlier question from the OP (scanny). But, it's turned into such a mess, can't help it. I mean, 1 right answer out of 3 so far? How is this circuit so confusing? We'll get to that, but first some history.

When I first saw this circuit I wrote an analysis of it as an emitter follower. I didn't see the ground at first, since it was cleverly concealed in plain sight between the U1 inverting input reference and \$R_{\text{load}}\$. Then in a comment scanny suggested that he thought the circuit was common emitter. What's he talking about? I looked at the circuit again and did a mental experiment varying node voltages and thinking about what that must mean, and everything still seemed to act like an emitter follower, so nah. But scanny had additional observations about the behavior that didn't make any sense for and emitter follower, but made a lot of sense for a common emitter. So, I redrew the circuit from scratch to look into things further. After redrawing the circuit I realized that I was dealing with an idiot: Me at 1am.

Here's an annotated version of the circuit I got on redraw:

schematic

simulate this circuit – Schematic created using CircuitLab

Redrawing the circuit as a small signal AC model made me reorient everything, and really think about V.unreg, V.ref, and where all of the grounds were. Resulting circuit is clearly a common emitter.

Important to realize in the circuit:

  • The real reference is S+ or ground.
  • V.unreg is differentially 45V, but common mode floats with Q1-c.
  • Both V.unreg and V.ref act as offset voltages.

If you compare the change of voltage across \$R_{\text{load}}\$ seen when U1-output is modulated in this circuit, to the original circuit, you'll see the two circuits do the same thing.


But, why has this circuit been so confusing?

Although, the original schematic is well drawn, the orientation of Q1 and relative placement of V.unreg and \$R_{\text{load}}\$ are very like one would expect for a emitter follower power stage. Emitter follower topology is also expected in an application like this (usually, since common emitter has many more stability concerns).

It's a kind of framing. People, by habituation, get spring loaded to see an emitter follower first. Once seen that way, there is denial of other points of view.

Here, let's re-redraw the circuit, in another different, but equivalent way.

schematic

simulate this circuit

It's pretty clear that everything is referenced to S+, V.unreg floats, and the voltage at S- is modulated by Q1-c through changing the common mode voltage of V.unreg.