You need to distinguish the kinds of flaws you're looking for and pick tests appropriate for those flaws. In particular, there are design flaws, and there are manufacturing flaws.
Design flaws would include things like not meeting criteria such as timing, voltage and current levels. These things are verified in the design lab, before a product moves into production. Design verification testing should include adequate margins for the inevitable tolerances found in the components you're using and your manufacturing processes.
On the other hand, manufacturing flaws include errors in PCB fabrication and assembly, including poor solder joints, missing or incorrect components, etc.
In general, if a product is both designed correctly and manufactured correctly, it will work. Since the design doesn't chage from one unit to the next, you generally only need to detect manufacturing flaws on the production line.
Boundary scan is specifically directed at finding manufacturing flaws, and for this, static or low-speed tests are generally fine. It sounds like you are trying to use boundary scan to verify design parameters (timing), and it really isn't intended to support this.
If you really need to this kind of testing in a production environment, you will almost certainly have to design a custom test that's specific to the product.
If you're concerned about whether the components you're buying meet their specifications, it is almost always better to test them separately, before they're assembled into your product.
For the specific problem of testing, e.g., DDR SDRAM, which has some very tight timing restrictions (both min and max) in order to function at all, but no boundary scan of its own, then a custom functional test is pretty much the only choice.
There are a number of ways to get there. You could use the JTAG debug features of your CPU to load and execute a small test program (or even more than one) during boundary scan. This may in fact be what your vendor is offering, but you'll need to dig deeper to be sure. The other alternative is to integrate such memory tests with the rest of your system functional testing, rather than doing them during boundary scan. This is probably the more common choice.
OpenOCD is an open source JTAG debugger, it supports a good range of adapters both open source and proprietary.
It's worth looking into. But, I have only used it for simple boards with single microcontrollers.