Electronic – Can a NOT gate be used to achieve 180 degree phase shift


I have seen from various sources which say that a NOT gate cannot be used to achieve an 180-degree phase shift. Is this claim true?

Edit: The question is definitely sounding unclear because that is how it was worded, but one thing I missed was it was asked in the context related to FPGA's. So I assume we are dealing with digital signals here. Anyways giving a sine wave as an input to the NOT gate would change the shape of the output itself so I guess there would be no question of comparing/calculating the phase difference.
The solution given was to use a DCM in an FPGA and it was explicitly mentioned not to use a NOT gate, but I don't understand why it won't work because inverting a wave is definitely an 180-degree phase change right? Please correct me if I'm wrong!

Best Answer

Since no answer so far (and one has a score above 20!) actually mentions FPGAs, I'll add the answer I think you are looking for. You can't invert a clock on an FPGA with logic for various reasons:

  1. Skew. The inversion is not instantaneous, so there would be a transitional time with both clocks matching. You probably don't want this.

  2. Architecture. FPGA's logic elements have dedicated clock input lines that are independent of the data lines. To route from data to clock nets involves connections that are suboptimal.

If you are trying to get an inverted clock inside the IC, you'll have to use one of the architecture's native clock modules.

If you are trying to drive an output with an inverted clock, the major vendors all have DDR logic that you can use to send the "data" of a continuous 010101 at "double data rate" which is actually the clock inverted. The dedicated circuits will handle any corrections needed. This lets you avoid using global clock resources for the inverted clock and also gives you a way to invert the clock in the field with a control register.