Electronic – Can this copper pour be an EMI problem

copper-pouremcpcb

I am looking at the following PCB (single layer).

enter image description here

The checked red/blue is GND.

  1. Can this polygon give EMI problems in the sense that it acts as an antenna because it does not form a closed loop ?

  2. Should polygons be closed loop ?

  3. On a signal layer board, is there any reason to have ground/vcc pours on unused copper areas ?

Best Answer

Can this polygon give EMI problems in the sense that it acts as an antenna because it does not form a closed loop ?

Yes, at high enough frequencies, that long "peninsula" of copper can act as an antenna, causing radiation, or capturing interference from external signals.

Should polygons be closed loop ?

Loops isn't really what you're aiming for, but it would be better to put some vias through the polygon to tie it tightly to the ground plane on an inner layer beneath it.

On a signal layer board, is there any reason to have ground/vcc pours on unused copper areas ?

In manufacturing, large "glass" areas (areas without copper) slightly increase costs, because they deplete the etchant more quickly.

As far as performance benefits, if your traces are not controlled impedance and you have an unbroken ground plane on an inner layer, I don't see much benefit to these copper pours.

If your traces are controlled impedance and intended to be microstrip, you probably need to increase the gap between the trace and the ground pour to maintain the correct characteristic impedance. A gap of 3 - 5x the trace width is preferred.

If your traces are controlled impedance coplanar waveguide, then of course you need the copper pours to form the return path for currents on those traces. But you also need to be sure the pour is fully connected to the end of the trace, and you need a pour on both sides of each trace.