Electronic – Causes for Double Bit error

error correctionmemory

If I have a 1 Gb memory with EDAC for single bit correction for a critical application, what could cause a double bit error in this memory? Provided that the queues never get out of sync which causes writes to memory to become corrupted. What other phenomenon (hardware/software related) do I have to consider to take into account for the probability of a double bit error to occur?

It's for an aircraft application, so thats why I included hardware, where we can have single event upset. I am just looking for a probability number I could come up with to justify using EDAC with SECDED.

Best Answer

Hardware: Certain high-energy radiation events can cause a shower of particles that affect multiple nearby bit cells. This is rare; how rare depends on the memory technology and the environment.

Software: Rowhammer-style attacks can sometimes flip multiple bits at the same time or within a short time interval.