I don't see too many issues using a standard USB camera in a vacuum. Your two largest issues are likely to be heat dissipation, and outgassing from the camera components.
Depending on how high a vacuum you need, you may need to package the camera in a hermetic container. There is almost inevitably going to be at least a small amount of soldering flux/VOCs left on the PCBs from production, and it will outgas when you pump the system down.
If you have sufficient pump capacity, or don't need extremely high vacuum, it shouldn't be too much trouble.
You could also try removing all the plastic from the camera, and baking the PCB assembly at a low temperature to speed up the out-gassing (~100°C?).
Second, at least some of the USB-cameras I have used do dissipate a fair amount of power, so depending on the camera, you may have localized heating issues due to the lack of convection cooling. It should be possible to deal with this using proper heat-strapping, though I think it would probably better to just pick a device with low dissipation.
Lastly, you can certainly buy some pretty interesting USB cameras, which do support all sorts of fun things like variable ISO, and variable shutter time. It mostly depends on your budget.
If you don't mind experimenting, I would say go to your local electronics store, and just buy a webcam, and see what happens (and post pictures!).
The hardest part, I think, is probably going to be hermetically sealing the cable feed-through. You can't just stick the cable in a cable gland, as you will get leakage through the cable, both between the strands, and between the individual wires and the sheath. You will need hermetically rated bulkhead connectors.
For CCDs:
- It's hard to clock the horizontal shift registers of a CCD much faster than 40 MHz without having a drop in you CTE (Charge transfer efficiency) as there is a limited drift velocity for electrons. The fastest I've even worked with is ~ 45 MHz, and I was cheating. How this problem is solved is to use a "tapped" architecture in which a subset of columns feed a shortened horizontal shift register each being run at the higher rate. So instead of trying to force those outputs out one amplifier you have them come out of 4 or 8 or more.
In your example above that would likely a 4 tap architecture.
I've used sensors that had as many as 256 Taps and an aggregate pixel rate of ~ 10 GPixels/s.
For NON CCD sensors (APS, CIS, APS etc. - how ever you label them) i.e. CMOS image sensor. It's much more easy to run at higher speeds with outputs running at 80 MHz or more. Faster than than become problematic with power and noise levels. So indeed these two end up being tapped.
Best Answer
The diagram shown is what is inside the CCD, so you don't need to choose any transistors. In fact, you couldn't possibly choose any transistors in the outside world that would work.
Let's put some facts/reference data up first. - Scope probe is ~10 pF - Most pins on an IC package at minimum are ~ 1 pF
It is entirely possible to have a CCD detect single photons, so lets say you are imaging in a dim room and you have 2 electrons that have been generated. Lets say you need to generate 10 uV to get over the noise of the outside world. That means that your sense node should be \$ \dfrac{2*1.6e-19}{10e-6}= 32.2 aF\$ i.e. \$32.2*10^{-15}\$ any stray capacitance in the outside world would swamp this. So even if your photodiodes could capture the photons and your transport register could move the charge to the output pin, you need to have the amplifier on chip.
These amplifiers are simple because in most cases they are the only transistors on the whole chip and the process is optimized for the Photodiodes and the transport registers.
So if you bias the amplifier correctly and generate the signals properly you should see that waveform come out of the pin. The \$\delta V \$ in the picture is the CDS value that you need. (Correlated Double sampling).
How the circuit works is very simple. the reset switch reset the sense node (\$C_s\$) to a known state. However, this generates a little uncertainly in that voltage (this is known as KTC noise). When the capacitor is floating, the horizontal shift register is actuated and charge is spilled onto the sense node, developing voltage which then controls the amplifier. \$ V =\dfrac{Q}{C}\$ where Q = signal charge. If you take the difference between the reset state (with ktc noise) and the final state (when charge is on the node and it still has the ktc noise there) you get the signal voltage with teh ktc subtracted away.