cmosmosfettransistors
I can't understand a thing from my book, it say that since in integrated circuit with CMOS have an output of high and low current that is equal we can't use the wired-or connection, but we can use it with Open Drain technology.
I have some question:
But we have to use a circuit like that:
Thanks for read!Hope that you'll have a nice day!
A "contact window" is a loop that connects two materials (usually a metal and a semiconductor) together. Since they are square frames, they look like windows. The picture above is a two-gate mosfet with metal gates. For each of the three source/drains you can clearly see the contact windows, connecting the semiconductor islands to the metal pads. The gates do not need a contact windows in this particular design, as they are already made out of metal.
What leads to lower resistance and capacitance is not so much the contact window itself, but the fact that the signal travels the distance through metal instead of semiconductor.
Bootstrapping is not really the correct term for this.
MOSFETs all have capacitance between the gate and drain. While some is a parasitic due to the wires, most of it comes from the actual structure of the MOSFET itself.
This capacitance has two effects: When driving the FET via the gate, as the FET turns on and off, the change in voltage across the capacitor is much greater than the change in gate voltage itself (imagine the gate goes from 0 to 5 V, while the drain changes from 48 V to 0.1 V). The current required to do this needs to be driven into the gate, and this makes the capacitance (as it appears at the gate) appear to be larger than just the nominal measured or data sheet value.
The other effect is apparent when a FET is used in an application such as a H-bridge. Imagine what happens to the low-side FET as the high-side FET is turned on. When the low-side is off, its gate-source voltage is low. Now, as the high-side FET turns on and pulls the drain of the low-side FET high, the drain-gate capacitance also tries to pull the gate of the low-side FET up also. If the driver for the low-side isn't strong enough to keep the FET off, the gate voltage on the low-side will rise and it may turn on. If this occurs, both FETs will be on and unwanted shoot-through current will flow, potentially damaging the FETs and certainly wasting power.
A solution for this is to slow down the turn-on of the high-side FET. Generally, fast-operating drivers like this need to be designed to have slow turn-on of the FET and strong turn-off pre drivers.
Best Answer
A wired or circuit is rather like that string they used on buses and trains to tell the driver to brake and stop.
The string is a common signal line that just hangs there till anyone decides to pull down on it.
In a circuit, a wired or connection is a signal line held up by a pull-up that one or more open-drain or open-collector gates are attached to. Each gate can only pull the voltage down on that signal line.
simulate this circuit – Schematic created using CircuitLab
You can see from the above that the output, "signal", will be low if any of the switches is closed.
That is:
SIGNAL is low if SW1 is closed OR SW2 is closed OR SW3 is closed.
Why We Need Open-Drain Drivers
Since the tops of those switches are shorted together, when you use gates to drive that line, the gate outputs also need to be shorted together.
If the outputs were able to source current as well as sink it, you would create the conditions where one gate is trying to push at the same time as another is trying to pull. This would result in a large destructive current in both gates.
As such we use open-drain, or open-collector gates for this function.
What use is it?
Now you may be wondering when we would do such a thing.
The nice thing about the wired or circuit is, unlike an integrated logic circuit, you do not need to know in advance how many devices are going to take part in the OR function. Just like in the bus-string where any number of passengers can pull it, any number of gates can be theoretically attached to the or-line.
A good example of this it the I2C communication bus that allows you to hook up an indeterminate number of slave devices to a single master device.
So why aren't all gates open-drain?
You may be asking that question and it is a valid one.
The major downfall with wired or connections is the pull-up.
Since it is not an active current source, when the line is released the voltage on the line rises at a slower rate dictated by the parasitic capacitance of the signal line. That means, there is an upper limit on how fast you can pass transitions on that line.
Since the line has a higher rest impedance it is much more susceptible to noise than an actively driven line.
Additionally, other inter-gate interferences can occur, especially with open-drain outputs which have internal capacitive effects.