I think, until you reduce the size of the problem, you will struggle.
We can't do magic. (It is unlikely someone in the community will set up a similar system, especially without schematics and maybe photos, and find the bug).
So we can only work from the code you post, and information in your question.
Cut out everything extra from the program.
Remove the other DMA, extra timers, etc.
If the only issue is some pin don't change, then driving the WS2812 is not necessary, so remove it too.
AFAICT, all you need to test this is some dumb LEDs on the pins that don't seem to change, a timer, the DMA controller, and some test data.
Reducing the problem to the smallest case that demonstrates the problem is not me being lazy, and asking you to do unnecessary work.
The process of reducing a system to its simplest case is a very powerful problem solving technique. Going through that process may be enough for you to discover the bugs yourself. At least reducing the system's complexity should remove some potential sources of bugs, which will help the community to help you.
Consider the following snippet from the STM32F1 manual regarding the USART data register and its corresponding status bit 'TXE':
Single byte communication
The TXE bit is always cleared by a write to
the data register. The TXE bit is set by hardware and it indicates:
• The data has been moved from TDR to the shift register and the data
transmission has started.
• The TDR register is empty.
• The next data can be written in the USART_DR register without overwriting the previous data.
This flag generates an interrupt if the TXEIE bit is
set.
Can you imagine a scenario where you are writing into the data register before the previous byte has made it into the shift register? Think about the sequence of events when you receive a stream of bytes, especially when you receive the third or fourth byte, what is your transmitter doing at this point? Is its data register occupied?
As a previous comment mentioned, you likely need a way to buffer previous byte(s) if the TXE status bit is not set. Writing into the USART data register while the TXE status bit is not set is a guaranteed way to lose information.
Edit in response to comment:
That's one way to do it, I would imagine it would work. However, I think doing away with DMA and using the USART interrupts would be a better approach. You can have 2 interrupt service routines for when a byte is received and when the transmit data register is empty. Based on those two events, you can decide to buffer the data (in the RX handler) and to empty the buffer (in TX complete handler). Care must be taken in deciding when to enable/disable the TX complete interrupt. I think the overhead of setting up DMA makes more sense for larger sequential transactions into (or out of) buffers, and less so for the single byte-by-byte case.
Best Answer
Those two lines reset the GPIOx peripheral. Firstly it sets the reset bit in the register to initialize the reset. Then it has to reset the reset bit to take the peripheral back to power reset state.