Your placement is fine.
Your routing of the crystal signal traces is fine.
Your grounding is bad. Fortunately, doing it better actually makes your PCB design easier. There will be significant high frequency content in the microcontroller return currents and the currents thru the crystal caps. These should be contained locally and NOT allowed to flow accross the main ground plane. If you don't avoid that, you don't have a ground plane anymore but a center-fed patch antenna.
Tie all the ground immediately associated with the micro together on the top layer. This includes the micro's ground pins and the ground side of the crystal caps. Then connect this net to the main ground plane in only one place. This way the high frequency loop currents caused by the micro and the crystal stay on the local net. The only current flowing thru the connection to the main ground plane are the return currents seen by the rest of the circuit.
For extra credit, so something similar with the micro's power net, place the two single feed points near each other, then put a 10 µF or so ceramic cap right between the two immediately on the micro side of the feed points. The cap becomes a second level shunt for high frequency power to ground currents produced by the micro circuit, and the closeness of the feed points reduces the patch antenna drive level of whatever escapes your other defenses.
For more details, see https://electronics.stackexchange.com/a/15143/4512.
Added in response to your new layout:
This is definitely better in that the high frequency loop currents are kept of the main ground plane. That should reduce overall radiation from the board. Since all antennas work symmetrically as receivers and transmitters, that also reduces your susceptibility to external signals.
I don't see the need to make the ground trace from the crystal caps back to the micro so fat. There is little harm in it, but it is not necessary. The currents are quite small, so even just a 8 mil trace will be fine.
I really don't see the point to the deliberate antenna coming down from the crystal caps and wrapping around the crystal. Your signals are well below where that will start to resonate, but adding gratuitous antennas when no RF transmission or reception is intended is not a good idea. You apparently are trying to put a "guard ring" around the crystal, but gave no justification why. Unless you have very high nearby dV/dt and poorly made crystals, there is no reason they need to have guard rings.
I am working for such a company but am mainly situated in the development, so I have some insight but there are probably people out there who know much more:
When it comes to testing, we follow various approaches. Basically we start with AOI (Automated Optical Inspection). This is rather cheap and reveals many errors before any further steps are done which require the board to be powered.
The next step is checking electrical connections. We do this in a few different ways, it usually depends on the amount of test points available and if the board was designed for testing (yes, usually no one cares for that in advance). The methods we use most are:
- Flying Probe (basically an automated way of contacting pins and checking if the resistance meets expected values). This also comes relatively cheap since the programs can be created from netlists which have to be specified by the customer.
- Boundary Scan: The Flying Probe can mainly contact test points or larger points such as resistors, ... if there is no available point to touch it on the PCB, the Flying Probe is of no use. To test Inter-IC connections we mainly rely on Boundary Scan Tests if the Controller supports these. But they have their limits as well. Also, programs can be "written" automatically but need to be adapted.
- In-Circuit-Tests: This is probably the most extensive test method we use (and also the most expensive). Basically we build an adapter which will host the DUT and contacts the various testpoints. Using integrated Boundary Scan techniques and stimulating digital and analog signals nearly every mode of testing is possible. E.g. it is also possible to boot the board to some bootloader and execute tests available in the bootloader, test Ethernet connections, test USB connections, ... No need to say that this comes at a cost.
I am sure there are even more possibilites of testing available but these cover the requirements we get from our customers quite well. Still, 100% testing is not possible.
Best Answer
I think most companies will do special requests, they may charge extra. If your thinking of soldering the bus bars to the PCB then if its relativity manufacurable then some will, if its not then they may say "we aren't comfortable doing this process".
There are companies that I've seen that do thick copper (3oz or greater). There are also some that integrate bus bars into PCB's these come with associated costs. But if you want to keep the copper within a 60C rise above ambient with 200Z you'd need a trace that is 5oz and 2" wide at least. A 3oz trace would need to be 3" wide.
Another thing is this will be a challenge to solder, as during assembly the PCB will struggle to warm up to the temperature to melt solder.
It should, as a designer, calculate and keep the resistance low. If you need to use multiple fasteners parallel them to keep the resistance low.