Electronic – Decoupling Capacitor Power Waste

All digital ICs should have decoupling caps between their power and ground pins. These should be ceramic and physically as close as possible to the IC. You want to minimize the loop length from power pin to cap to ground pin thru the IC and back to the power pin.

Decoupling caps deal with short term current spikes the IC draws. They must therefore be high frequency. Large capacitance is not necessary, and since large capacitors usually have poor high frequency response, they are worse. A 100µF electrolytic cap is pretty useless for decoupling. 1µF to 100nF ceramic is good.

As for the cap on the motor, the idea is good but I think 100nF is too large. That could cause excessive or unnecessary current to flow in the H bridge every time it switches. If you're only reversing motor direction occasionally, then this isn't a big deal. If you're using the H bridge to modulate the apparent motor drive with PWM, then you should lower the cap. Something like 1nF should still cut down the noise the motor is making while not getting in the way of switching.

This is hard to answer without knowing the what exactly is going on inside the control loop, which is probably not described with much detail in the datasheet. Saying it is "optimized" for 30 mΩ doesn't say what it really needs or what happens when it's not exactly 30 mΩ. Since they make a issue of the output cap ESR, there should be a min/max ESR spec elsewhere in the datasheet.

Hopefully 0 ESR is OK, else it gets inconvenient. Lower ESR is generally better, and certainly closer to ideal, for a capacitor. Capacitor spec sheets therefore often only spec maximum ESR. In that case you either have to get the guaranteed minimum from the capacitor manufacturer, or add deliberate resistance. A better answer is to stay away from chips that specify a minimum output cap ESR to be stable.

That chip is probably old, as ceramic capacitors have come a long way in the last few years. These have much lower ESR than tantalum, and can now approach such capacitances at reasonable cost. Newer chips now make use of the lower available ESR to get better performance instead of requiring the capacitor to have a high resistance. This is a all around better strategy.