Electronic – Design a T flip flop and draw the asynchronous state diagram

^{simulate this circuit – Schematic created using CircuitLab}

For example When both J=K=1; the input NOR gate-1 & 2 respectively 0 & 1.When one of the input of Nor gate is one the output will be zero.so when Nor gate-2 output change to zero then both input of NOR gate-1 will be zero so output of NOR gate-1 changed to one.As per your point of view both q & q bar zero may happen between toggle states (I mean it may happen @ time between NOR gate-1 take Q bar=0 output & changed NOR gate-1 output equal to zero).But stable final output will be toggle one.

Sorry friend if any wrong in my logic.Kindly please let me know if any..

We go from the state STAR ---> LOAD if we give q1 = 1 and various q0 (blue). Then we create two separate tables for JK .... Follow the diagram :)