EAGLE Castellations – Designing Castellations/Half Holes


I wish to use some castellated pads or 'half holes' for board to board connections but I'm having a hard time finding a reference detailing how to specify these in my CAD package of choice (EAGLE).
My approach has been the following:

  • Create a custom package
  • Place a large rectangular pad on the top layer.
  • Place another similarly sized pad at the same x,y on the bottom layer
  • Place a via whose drill lies inside the pads
  • In the library's device editor, append both pads and the via to the same pin
  • In the board layout, run the board outline through the center of the vias on the dimension layer

The result looks similar to this:
result http://files.zzattack.org/img/upload/tmp878E.png

Now for my question(s):

  • What are reasonable pad width/length, via diameter and drill diameter for castellated pads aligning with SOIC (0.05" spacing) package pads?
  • Should the pads run all the way down the end of the via, to the center of the via, or does it not matter?
  • Can I get rid of the 'dimension' DRC error?
  • Is there perhaps a 'proven' library package that I could have used/modified instead?

Best Answer

If via ring is small and there is enough space, there is no limit for the ring size. But if there is not enough space coupled with dense lines, the ring size should be over 0.1mm.Min. Size of drill via CNC is 0.3mm. 6.3mm is maximum size. Half-hole is a special technology and the min. aperture must be over 0.6 mm it is our pcb board capabilities. you can see it as reference.