digital-logicflipfloplogic-gatessynthesis
I have 3 input signals which are pulse waveforms The output is switch to high once once all 3 first rising edges of 3 inputs are detected.
Is there a digital circuit from logic gates, flip flop that can do that?
I am thinking about flip flop but the problem is that it detects with every rising edge not just the first rising edge.
The only change that is required to convert your falling-edge triggered flip-flop to a rising-edge triggered flip-flop is to swap the true (non-inverted) clock and the inverted clock at the pins of your tri-state buffers and the transmission gate. For example, the center transmission gate in a rising-edge triggered flip-flop would have the true clock connected to the NMOS transistor and the inverted clock connected to the PMOS transistor.
By the way, near the middle left of your diagram you have a circled inverter that shows Q at its output and !Q at its input. That's correct...the output of the inverter just to the right of the circled inverter is !Q (Q-bar) rather than Q. If you follow the path from the D input through an inverting tristate buffer and the NOR gate you will see that the signal at the right end of the (non-inverting) transmission gate must have the same polarity as D, so that point in your circuit represents the true (non-inverted) Q value.
You may implement this digital design for detecting rising edge.
simulate this circuit – Schematic created using CircuitLab
The output will go high as soon as a rising edge is detected on the D input. The output is cleared on the next rising clock edge.
Best Answer
You could use the circuit below with 3 D flip-flops and one 3-input AND gate. You would also need to use the reset input of the flip-flops to bring the output back to zero (not indicated in the schematic).
simulate this circuit – Schematic created using CircuitLab