Electronic – Do AC inverter H bridges ever get driven this way

I'm guessing you're trying to drive some AC motor that was originally designed to run on 50 Hz AC.

I'm assuming you're using two IRS2113 chips, the "left" chip controlling the two FETs connected to the "left" wire going to the motor, and the "right" chip controlling the two FETs connected to the other wire going to the motor. You probably want to check out the IRS2113 datasheet and the FET datasheet(s).

It is your responsibility to never, ever drive both HIN and LIN of the left IRS2113 chip HI at the same time -- the "self-destruct" state. As JustJeff points out, if both HIN and LIN of the left FET driver chip are ever high at the same time, the FETs connected to it will, in effect, short the rails ("shoot through", "fuse test", etc.), and much unwanted excitement will follow. (Never, ever drive both HIN and LIN of the right IRS2113 chip HI at the same time, either).

A few people don't use a translation circuit at all; they directly connect the left HIN and LIN and the right HIN and LIN directly to 4 independent output pins of the microcontroller, and hope that the software doesn't have any bugs that would set the FETs to the self-destruct state.

I prefer using a digital logic gate, such as the external NOT gate you mention, to enforce this "avoid the self-destruct state" condition in the motor driver hardware, rather than software.

It looks to me that the IRS2113 (like many other "high-side drivers") uses a boost circuit that can't really produce a 100% "ON" in the high-side transistor; it assumes that software will periodically turn that transistor OFF, so your software might need to limit the maximum PWM duty cycle to a maximum of something like 255 ticks HI + 1 tick LO.

bipolar

The simplest (in hardware) approach is to drive the entire H bridge/motor system in one of two basic states of the H bridge: either

State 0: The microcontroller PWM output is LOW. This drives the left LIN and the right HIN, turning the corresponding FETs off. That output also drives a NOT gate which drives HI the left HIN and the right LIN, turning those corresponding FETs ON. This in effect connects the motor's left wire to HI and the motor's right wire to LO. If things stay in this state long enough, the motor turns in the direction I call "forward".

State 1: The microcontroller PWM output is HI. This drives the left LIN and the right HIN, turning the corresponding FETs ON. ... This in effect connects the motor's left wire to LO and the motor's right wire to HI. If things stay in this state long enough, the motor turns in the direction I call "reverse".

With a PWM running at reasonable speeds, setting the duty cycle to 50% HI, 50% LO, you end up with the motor stationary (possibly humming a little).

This 2-state (bipolar) system is sometimes called "Locked-Antiphase". a b

trilevel

Trilevel, aka "Sign-Magnitude Drive"

Adding a third state makes things a little more complicated and difficult to debug, but it typically improves (reduces) harmonics and makes the system more power efficient.

State 3: Some people use a third state turns off all the FETs, letting the motor freewheel. (If you manage to turn off any 3 of the 4 transistors and leave the other one ON, that also works just as well as a freewheel state). If things stay in this state long enough, the motor "stops". (In some cases, external forces spin the motor in one direction; the direction is not under the control of the electronics).

Alternate State 3: Some people use a third state that turns on both the lower FETs, turning off both upper FETs, which slows down the motor ("brake"). (Others turn on both the upper FETs, turning off both lower FETs; that also works just as well as a "brake" state). If things stay in this state long enough, the motor stops. (Even when external forces push the motor in one direction, this "brake" generally causes the motor to stop).

There are a variety of ways to implement digital logic between the microcontroller and the FET driver that supports trilevel drive, but also avoids the self-destructive states. (Some motor driver chips such as the IXYS IXDN404 include this anti-shoot-through direction/PWM translation circuit, but the IRS2113 does not).

Such translation circuits generally require a "direction" and a "PWM" line from the microcontroller. The software sets the "direction" to "forward", and then adjusts the duty cycle of the PWM to control the speed from "idle" to "full speed forward". (The two states of the PWM, in effect, are translated to the two states "State 0 forward" and "State 3 idle"). Much later, the software sets the "direction" to "reverse", and then adjusts the duty cycle of the PWM to control the speed from "idle" to "full speed reverse". (The two states of the PWM, in effect, are translated to the two states "State 0 forward" and "State 3 idle").

Translation circuits that support tristate motor control: a b c d e

You might think that these circuits would have 100% LO, 0% HI PWM duty cycle give "idle" (in either direction), and 0% LO, 100% HI give "full speed" (in whatever direction the "direction" line indicates). But lots of people use a direction/PWM translation circuit that does something more confusing, and then fix it up in software.

Perhaps the simplest such circuit translation uses the PWM to drive the left LIN and a NOT gate that in turn drives the left HIN. Another general-purpose output on the microcontroller drives the "direction" signal, which drives right LIN and a NOT gate that in turn drives the right HIN.

Yes, there are stability issues and a brief moment when both FETs are on but the beauty of using a FET on the pull-down part of the circuit (i.e. a synchronous buck converter) instead of a schottky diode is this: -

1. Whatever duty cycle your PWM is the output voltage stays constant as a fraction of input voltage - you are in effect using the L and C on the output as a low pass filter to a square wave input.
2. Whatever load you have connected, providing the FETs are lowish on resistance, within reason you don't need to change the PWM mark-space ratio.
3. It will be more efficient on heavier loads than a non-synchronous buck regulator but the down-side is that on light loads it will be less efficient because you need current to drive the N channel FET because of gate capacitance.

I'd also advocate building a 555 timer sawtooth generator as the basis of your system. Something like this: -

I'd then feed it into a fast comparator and then the use the comparator output to drive the two FETs. The two FETs can be "time segregated" with a small RC time delay on the output of the comparator - the undelayed output and the delayed output would feed an AND gate for one of the gate drives and the the same for the other gate drive but using a NOR gate. Plan on maybe 50ns time delay introduced.

What you get is a half-decent synchronous buck convertor that just needs an input to the other comparator input to get the required duty cycle changes. OK so far? Then you can apply a simple control loop that lowers the 2nd input to the comparator as the input voltage gets bigger. Get this working and then apply another small control loop that actually regulates the PWM with load current changes a tad and this would probably work and no negative feedback involved.

Then, as the final touch, and with care and subtlety apply an overall control loop to keep the output better stabilized but remember, with a sync buck you can pretty much get half-decent stable performance without control loops that use negative feedback - if you are wanting to go this approach I can recommend it.

However, for me, I'd just call on Linear Technology and get the device that already does the job.