You'll always have some noise on an ADC, especially SA (Successive Approximation) types on the microcontroller die. Sigma-delta perform better for Gaussian noise, as they integrate it. Don't expect 12 ENOB from a 12-bit ADC.
The controller's noise is a reason why most microcontrollers don't give you a higher resolution than 10 bit, and the AVR offers the possibility to stop the microcontroller during the ADC's acquisition, which should confirm that at least some of the noise comes from the controller.
But the question is: do you care? 1.5 bit of noise on a 12-bit ADC still leaves you more than 10 bits, or better than 0.1 %. How accurate is your Hall sensor? Other components in the circuit?
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You seem to use the PSoC's internal oscillator, since I don't see any crystal on the schematic. It looks OK: you have the proper decoupling. Apart from the internal clock the only high speed part in the circuit seems to be the SPI, but you say that this will be silent during measurements. The rest of the board is DC or probably relatively low frequent like the Hall effect sensors. And it's a Damn Small™, which also helps: shorter traces will pick up less noise. Sure I could nitpick about the MCP1702, which I would rotate 90° CCW so that the output capacitor can be placed even closer to the pins, but that won't solve the problems.
I only see one change in the layout which might improve your S/N ratio:
In the datasheet split analog and digital ground planes are suggested for "Optimal Analog Performance" (page 10).
For the rest: it's a small board like I said, that means short traces and decoupling within a few mm. So I would like to have another look at the noise's source. Prime suspect is the PSoC's clock. The PSoC can run a very low supply voltage, and that would reduce its noise. Of course it would help much if VDDA has to be lowered as well, but I didn't read anywhere in the datasheet that VDDA shouldn't be higher than VDDD.
Next, the ADC. On page 55 of the datasheet it says 66 dB SINAD, that's 11 bits, close to what you get now. The A1324 datasheet gives us 7 mVpp noise on a quiescent voltage of 2.5 V. That's also far less than the 72 dB S/N ratio which 12-bit could give you. You may improve this a little bit with extra filtering.
You mention the better performance of the MCP3208, but that's an ADC away from the microcontroller, and that may explain how an SA ADC can do better than a sigma-delta with the same resolution.
So, the options I see: lower the digital power supply voltage and split analog and digital grounds.
Best Answer
My answer first makes the following assumptions:
The inductor is really just a place holder for the output of a dc-dc converter (I would assume a buck converter though it doesn't matter what topology).
You're real question is how to properly decouple each of the 3 different power inputs and they power different aspects of the chip (digital and analog etc.) when the power supply is about that far or further away. You're asking about the trace layout mostly because you believe this is, in this case, important.
You have your reasons for the distance between the power supply output and the chip. Perhaps you are hoping to avoid doing that for fear of picking up noise from radiated EMI, which any switching converter will produce to some degree. And proximity is definitely your enemy when it comes to that. Regardless, I'm assuming that you asked about what to do in the situation you asked about to decouple noise, and not how to decouple something in a completely different situation like the other answers to your question.
First off, using one or 3 traces is not important in this case. You do want to minimize inductance when possible, and that is done neither by using a single common trace or 3 separate traces coming from the power output. If you have room for 3 traces, you have room for a single trace that is 3 times as wide. A single wider trace will always have lower inductance than many isolated traces. At least assuming the ground return currents are free to move in a larger plane underneath.
Once you have used this larger wide trace to reach the proximity of your chip, you must, and this is an absolute must, use local decoupling capacitors. They will be the source of power, while the larger loop will serve to recharge those capacitors, but the chip doesn't care and can't tell the difference between a distant power supply and local capacitor or the output capactor on the same supply directly adjacent. Electrons are electrons. The decoupling capacitors, well, decouple the things near by from the larger circuit by acting is local power sources. At least, in a perfect world.
But, heed the warnings about resonance and ringing. Ceramic capacitors have single digit milliohms of impedance. On inrush, they can cause large current transients and form an LC tank with just the few hundred nanohenries inductance from longer trace lengths. This is why you don't just use a ceramic capacitor.
This very real phenomenon can indeed fry or pop all sorts of semiconductors and other sensitive components, but only in improperly decoupled circuits. It's not an actual problem, as it has a very trivial and effective solution: just damp it.
There is no problem as long as you decouple your circuit properly, and properly means critically damping those LC loops.
You can do this with a series resistor (not ideal but cheap and small) or a high ESR capacitor in parallel and proximate to the ceramic decoupling capacitors. Anything above 0.5 ohms resistance (in series or the ESR to ground of a capacitor) will prevent any voltage overshoot from occurring even for meter long traces. Tantalums (non polymer) are great for this, they typically have 1 or two ohms resistance and are small.
So, use a single wide trace, fan it out at the chip with a separate ceramic decoupling capacitor for each supply rail, all connected to the same positiv terminal of a high ESR electrolytic (aluminum or tantalum) and you'll be fine.
http://cds.linear.com/docs/en/application-note/an88f.pdf goes into this with more depth for anyone interested.