Electronic – dsPIC: Using FRC and OSC2 as an I/O pin

You should check out example 7-2 in the pic24E family reference manual (FRM) titled "Code Example for Using PLL with 7.37 MHz Internal FRC":

// Select Internal FRC at POR
_FOSCSEL(FNOSC_FRC & IESO_OFF);
// Enable Clock Switching and Configure Primary Oscillator in XT mode
_FOSC(FCKSM_CSECMD & OSCIOFNC_OFF & POSCMD_NONE);

int main()
{
    // Configure PLL prescaler, PLL postscaler, PLL divisor
    PLLFBD=63;            // M=65
    CLKDIVbits.PLLPOST=0; // N2=2
    CLKDIVbits.PLLPRE=0;  // N1=2

    // Initiate Clock Switch to FRC oscillator with PLL (NOSC=0b001)
    __builtin_write_OSCCONH(0x01);
    __builtin_write_OSCCONL(OSCCON | 0x01);

    // Wait for Clock switch to occur
    while (OSCCONbits.COSC!= 0b001);

    // Wait for PLL to lock
    while (OSCCONbits.LOCK!= 1);
}

It looks like the critical step you're missing is __builtin_write_OSCCONL(OSCCON | 0x01);

Also, looking at the math: 7.37*(76/(2*2)) == 140.03MHz which is slightly outside the allowed range, assuming that 140MHz is actually the maximum range (don't ask me why but for some reason it seems like it may be 120MHz).

If this still doesn't work then perhaps there's just an issue with your power supply. The internal FRC oscillator is unstable under temperature and voltage stress, so perhaps you should check to see if you have too much noise. This would make the FRC wonky as well as the VCO used in the PLL, preventing a lock.

If you look at table 30-18 in the pic24EP128MC206 datasheet, it tells you that over the temperature and voltage range you have about a ±1% for some models and ±2% for others. Figure 31-9 shows the variation with a stable voltage over a temperature range. There doesn't appear to be an analysis of voltage variation at a stable temperature.

If you're trying to get a stable run at a high frequency I would just grab a crystal.

EDIT (from comment): So from the sounds of your other posts about your conditions it sounds like you should look elsewhere for a problem. What's the frequency of the ripple? Did you size the internal Vreg capacitor properly? It sounds like since this is a locking issue and not a setting issue you're having some other problems with the board that aren't related to your code.

EDIT:

Glad this turned out to be the right answer! Good luck debugging the rest of the board!

Two things to recognize:

1. the timer is an upcounter that interrupts on overflows at which point you should reload the start of the upcounter.
2. the frequency is the output of the PLL if you have one configured

= (f_osc / 4)^-1 * prescaler * (65535 - TMR1)
= (16MHz / 4)^-1 * 1 * (1000)
= 250us

Where timer is being used as a 16-bit timer and TMR1 is the value written to TMR1. I like to specify the preload as a negative number because it's more intuitive than seeing something as less than UINT16_MAX:

#define TIMER1_TIME  (-1000)

void InitTimer1(void) {
  T1CONbits.T1CKPS = 0b00;              // Prescaler is divide-by-1
  T1CONbits.TMR1CS = 0b00;              // Clock source is (f_osc / 4)
  TMR1H = TIMER1_TIME >> 8;             // Load the start of the upcounter
  TMR1L = TIMER1_TIME & 0xFF;
  IPR1bits.TMR1IP = 1;                  // Set to high priority
  PIR1bits.TMR1IF = 0;                  // Clear interrupt flag
  PIE1bits.TMR1IE = 1;                  // Enable interrupt
  T1CONbits.TMR1ON = 1;                 // Turn on the the timer
}

void MyIsr(void) {
  // Reload the start of the upcounter
  TMR1H = TIMER1_TIME >> 8;
  TMR1L = TIMER1_TIME & 0xFF;
}