Electronic – Feedback regarding isolation practices on a 5V/Mains PCB


I am currently designing a PCB for a project including PID-control of a heater. The heater runs on mains (220V) and is controlled using zero-crossing switching to regulate the power and minimize EMI and THD.
I already designed multiple PCBs , also ones with mains, but never low and high voltages on the same board. By nowenter image description here I have e prototype-design, where I made the following safety considerations:

  • strict separation (HV,leftside – LV, right side, see line on top silk layer)
  • connection HV-LV only via optotransistor/-triac (U1 and U2) and a switching converter U6 including a isolation transformer
  • further protection with MOV(R6), fuse (F1) and use of a snubberless triac Q1
  • copper planes of LV part start only after the last everything is converted to LV

Since I do not really have any space constraints I designed everythig with a lot of clearence (grid is 1mm) and used 2mm traces for the AC-powerlines. The PCB is then mounted in a metal box connected to PE or in one out of isolation material.
My main concern is that there are three JST plugs on the LV side (U4,7,8) that connect to rotary encoders, screens,etc, that are accessible to the user. While I am confident about the isolation on the PCB I still wanted to get second takes on the design, especially regarding the connections to the user-accesible features. Are there additional considerations to make in this case?

Any feedback regarding any part of the design is appreciated!

Best Answer

I have the following feedback on your layout, roughly ranked by importance:

  • Your PE trace is far too thin. In the case of a live-earth short downstream of your board, you run the risk of vaporizing this trace before the fuse or a breaker / GFCI trips. You want mains traces as short and as fat as possible; of these PE is the most important for safety.
  • You could increase the clearance between the different mains traces. HV - LV isolation is top priority, but L-PE and N-PE are also important, and if you can manage, L-N clearance is also good. I would aim for at least 4mm clearance wherever feasible. I realize that's not possible everywhere, but there is room for improvement.
  • Consider making a slot in the PCB below U1 and U2, between the HV and the LV side. This further increases the creepage between HV and LV.
  • Keep mains traces as short and fat as possible; to keep resistance low. In case of a fault, you want a low resistance so a breaker/fuse trips decisively. Use top and bottom traces if appropriate. Your L trace is a bit too long for my taste. Keeping traces short also helps with EMI. I would prioritize keeping the traces "on the power path" (between P1, P2, F1, Q1, R6) over those "on the signal path" (dealing with R1, R4, R5, U1, U2).
  • Clearance between the pins of Q1 is particularly low. I like using a footprint with the pads further apart, and spreading the triac's legs out before soldering. See e.g. this answer.
  • Are you using huge footprints for R1 and R5 for clearance and power dissipation? You can also use several smaller resistors in series to achieve that. Use similar value resistors, assume voltage distributes equally over them so you can add their voltage ratings, and derate generously. Like a factor 3 or so.