Electronic – Ferrite bead for high-speed digital IC

digital-logicferrite-beadnoise

Although I've seen numerous recommendations for the use of FBs on the power supply rails of noise-sensitive analog circuitry, the opinions regarding their use with high-speed digital circuitry are conflicting. For instance, this link from TI, discourages their use stating that they block the power supply during peak current draw. They then discredit the use of bypass capacitors as a solution to this problem:

[T]he impedance of even the best capacitors is too high above about
200 MHz to supply enough peak power for the processor.

However, if you can't use ferrite beads in this context and bypass capacitors are similarly inadequate for filtering noise at the clocking frequency, how do you prevent the IC's noise from reentering the power supply? I imagine that linear regulators would also be insufficient here since they tend to have poor PSRR above a few hundred kHz (and the good ones I've seen don't do much above a few MHz). Although I know that PSRR deals with preventing input voltage noise from getting to the output, I don't know that it also deals with the reverse direction? Does it? Is there another metric for this?

Can I use ferrite beads and bypass caps for high-speed digital ICs and, if not, what would I use? If they're not suitable for high-speed digital logic, can I use them without issue for lower-speed digital ICs, say below 100MHz or so?

Best Answer

Ferrite beads used to isolate local power supply nets have two effects:

  1. Prevent noise from the main power supply net from reaching the isolated chip.

  2. Prevent noise generated by the isolated chip from reaching the main power supply net.

As the link you provided, and the Howard Johnson article linked from there, say, if the first effect is desired then isolating different chips with ferrites is likely to be overall counterproductive.

I'd recommend to use ferrites mainly when the 2nd effect is desired. For example, you have a high speed processor on the same board as a sensitive analog circuit. Use a ferrite to isolate the power supply of the processor so that it's simultaneous switching noise (SSN) doesn't impact the sensitivity of the analog circuit.

In this case, the ferrite will in fact increase the noise seen by the processor. If the noise is not excessive, this may have no impact on the processor performance at all. If necessary, you can use multiple bypass capacitors in parallel, reverse-geometry capacitors, etc. to achieve lower impedance between power and ground and mitigate the negative effects of isolating the supply.

In case the analog circuit does not produce substantial SSN itself, it may also be helpful to isolate the analog circuit behind a ferrite. This is essentially what's described in the "When to use them" section of the TI article.

If in doubt, you should use a simulator to design your power bypassing and decoupling network, being careful to include all important parasitic effects of your capacitors and ferrites. You want to design the network to have a low impedance when driven by a current source in place of any of the SSN-producing chips; and to have a low transfer impedance from any SSN-producing chip to the supply of any sensitive circuit.

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