I'm looking for some help with understanding (in fact, correcting or confirming my understanding) of how the following circuit works:
U1 here is TL431 voltage regulator, for example from Texas Instruments. This circuit is intended to provide a regulated voltage over Vout pins, and I'm looking for proper explanation how that is achieved. Here is what I managed to figure out:
At some moment, U1 is closed and current is flowing from Vin through R1 resistor directly to the Q1 gate, which opens the transistor at some voltage. In that way, we achieve some voltage at Vout, but we want some regulated, i.e. constant voltage, more or less independent of a load resistance being connected to the output.
When the volate at the source pin of Q1 reaches some point, determined by resistor divider on R2, R3 and R4, U1 opens and current starts to flow through R1, then U1, reducing the voltage applied to Q1 and thus partially closing it, which reduce the voltage at Q1 source pin.
If we remove C2 and C3 capacitors from the circuit, we should see some the pulsations at Vout pin, caused by this transistor opening/closing.
Please let me know if my understanding is correct and if not, how this circuit achieves regulation.
Also if this question is not quite suitable for this site, I do apologise and will remove it.
Best Answer
This is a linear regulator, not a switching regulator, so you should not see pulsations.
Other than that, your understanding is fairly accurate. The TL431 will draw more and more current through the cathode as the voltage on the sense terminal exceeds its internal reference voltage of about 2.5V. The MOSFET is wired as a source follower, so it has a voltage gain of about 1. C2 is there to make sure the feedback to U1 is not unduly delayed, which could cause oscillation.
So U1 will maintain the voltage at the gate of Q1 in order to have the divided output voltage (R3/R4/C2- node) equal roughly 2.5V.
Because Q1 is used as a source follower, this regulator will not be low drop-out, however it's much easier to assure stability with various load capacitances because Q1 is not adding voltage gain. There is also a lower limit on output voltage of ~2.5V- achieved when R2+R3 = 0 ohms.