This is a very complex issue, since it deals with EMI/RFI, ESD, and safety stuff. As you've noticed, there are many ways do handle chassis and digital grounds-- everybody has an opinion and everybody thinks that the other people are wrong. Just so you know, they are all wrong and I'm right. Honest! :)
I've done it several ways, but the way that seems to work best for me is the same way that PC motherboards do it. Every mounting hole on the PCB connects signal gnd (a.k.a. digital ground) directly to the metal chassis through a screw and metal stand-off.
For connectors with a shield, that shield is connected to the metal chassis through as short of a connection as possible. Ideally the connector shield would be touching the chassis, otherwise there would be a mounting screw on the PCB as close to the connector as possible. The idea here is that any noise or static discharge would stay on the shield/chassis and never make it inside the box or onto the PCB. Sometimes that's not possible, so if it does make it to the PCB you want to get it off of the PCB as quickly as possible.
Let me make this clear: For a PCB with connectors, signal GND is connected to the metal case using mounting holes. Chassis GND is connected to the metal case using mounting holes. Chassis GND and Signal GND are NOT connected together on the PCB, but instead use the metal case for that connection.
The metal chassis is then eventually connected to the GND pin on the 3-prong AC power connector, NOT the neutral pin. There are more safety issues when we're talking about 2-prong AC power connectors-- and you'll have to look those up as I'm not as well versed in those regulations/laws.
Tie them together at a single point with a 0 Ohm resistor near the power supply
Don't do that. Doing this would assure that any noise on the cable has to travel THROUGH your circuit to get to GND. This could disrupt your circuit. The reason for the 0-Ohm resistor is because this doesn't always work and having the resistor there gives you an easy way to remove the connection or replace the resistor with a cap.
Tie them together with a single 0.01uF/2kV capacitor at near the power supply
Don't do that. This is a variation of the 0-ohm resistor thing. Same idea, but the thought is that the cap will allow AC signals to pass but not DC. Seems silly to me, as you want DC (or at least 60 Hz) signals to pass so that the circuit breaker will pop if there was a bad failure.
Tie them together with a 1M resistor and a 0.1uF capacitor in parallel
Don't do that. The problem with the previous "solution" is that the chassis is now floating, relative to GND, and could collect a charge enough to cause minor issues. The 1M ohm resistor is supposed to prevent that. Otherwise this is identical to the previous solution.
Short them together with a 0 Ohm resistor and a 0.1uF capacitor in parallel
Don't do that. If there is a 0 Ohm resistor, why bother with the cap? This is just a variation on the others, but with more things on the PCB to allow you to change things up until it works.
Tie them together with multiple 0.01uF capacitors in parallel near the I/O
Closer. Near the I/O is better than near the power connector, as noise wouldn't travel through the circuit. Multiple caps are used to reduce the impedance and to connect things where it counts. But this is not as good as what I do.
Short them together directly via the mounting holes on the PCB
As mentioned, I like this approach. Very low impedance, everywhere.
Tie them together with capacitors between digital GND and the mounting holes
Not as good as just shorting them together, since the impedance is higher and you're blocking DC.
Tie them together via multiple low inductance connections near the I/O connectors
Variations on the same thing. Might as well call the "multiple low inductance connections" things like "ground planes" and "mounting holes"
Leave them totally isolated (not connected together anywhere)
This is basically what is done when you don't have a metal chassis (like, an all plastic enclosure). This gets tricky and requires careful circuit design and PCB layout to do right, and still pass all EMI regulatory testing. It can be done, but as I said, it's tricky.
2) I highly recommend AGAINST cutting ground anywhere near high-speed signals. Stray capacitance really doesn't have too much of an effect on digital electronics. Usually stray capacitance kills you when it acts to create a parasitic filter at the input of an op amp.
In fact, it is highly recommended to run your high-speed signals directly overtop of an unbroken ground plane; this is called a "microstrip". The reason is that high frequency current follows the path of least inductance. With a ground plane, this path will be a mirror image of the signal trace. This minimizes the size of the loop, which in turn minimizes radiated EMI.
A very striking example of this can be seen on Dr. Howard Johnson's web site. See figures 8 and 9 for an example of high-frequency current taking the path of least inductance. (in case you didn't know, Dr. Johnson is an authority on signal integrity, author of the much lauded "High-Speed Digital Design: A Handbook of Black Magic")
It's important to note that any cuts in the ground plane underneath one of these high-speed digital signals will increase the size of the loop because the return current must take a detour around your cutout, which leads to increased emissions as well. You want a totally unbroken plane underneath all your digital signals. It's also important to note that the power plane is also a reference plane just like the ground plane, and from a high-frequency perspective these two planes are connected via bypass capacitors, so you can consider a high-frequency return current to "jump" planes near the caps.
3) If you have a good ground plane, there's pretty much no reason to use a guard trace. The exception would be the op amp I mentioned earlier, because you may have cut the ground plane underneath it. But you still need to worry about the parasitic capacitance of a guard trace. Once again, Dr. Johnson is here to help with pretty pictures.
4.1) I believe that multiple small vias will have better inductance properties since they are in parallel, versus one large via taking up approximately the same amount of space. Unfortunately I cannot remember what I read that led me to believe this. I think it's because inductance of a via is linearly inversely proportional to radius, but the area of the via is quadratically directly proportional to the radius. (source: Dr. Johnson again) Make the via radius 2x bigger, and it has half the inductance but takes up 4x as much area.
Best Answer
The reason is quite simply that we are trying to make a 'moat' with a single bridge across it. With two cuts in the plane, the analogue returns currents from each device can get mixed together, introducing noise from one set of ADC inputs to the other. In addition, we have provided a circular route for the digital returns to go around the analogue side of the ADCs.
Digital noise from ADC2 could take a path behind it, as could digital noise from ADC1. Put a little curved trace around the analogue side of ADC2 from the two cuts; this is where some digital noise could flow.
I have actually had to fix a board that did precisely this, and the faults were subtle and induced a great deal of hair pulling.
To avoid the issue, do the following (works for relatively slow analogue, fast analogue have different segregation requirements - Note 2):
Do not route digital power in the same area (on any layer) in the same area as the sensitive analogue signals. I have found that such power tends to re-radiate from other planes. Note 1.
Ensure the primary power source is on the digital side of the board. This ensures that all returns paths move away from the analogue side.
Do not take high speed tracks in the same area as the analogue circuitry (on any layer)
Arrange the ADCs / DACs or whatever such that there is a single gap in the return planes. If you have differing speed analogue signals, put the fastest ones closest to the gap.
If you are driving the analogue circuitry with a separate regulator, put the regulator such that is spans the split in the plane with the output and feedback (if used) on the analogue side. If using a ferrite (a very common practice), then the same placement rule applies.
Do separate the power either through a ferrite or regulator.
Note 1. This is primarily due to the limitations of layout tools. If I could make the tool attach a via to only specific layers, I would, but this is very difficult with most existing toolsets.
Note 2. Use a separate moated area (each with its own local ground and ferrite / regulator) for each section with high speed analogue signals. See this excellent guide for some more details.
[Update] Added note on slot antenna
The two cuts in the plane can produce a slot antenna, where a great deal of the digital noise can accumulate, depending on the frequency content and the aperture sizes and distances.
HTH